From: Anup Patel <apatel@ventanamicro.com>
To: Paolo Bonzini <pbonzini@redhat.com>, Atish Patra <atishp@atishpatra.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Anup Patel <apatel@ventanamicro.com>
Subject: [PATCH v2 0/7] KVM RISC-V Sv57x4 support and HFENCE improvements
Date: Wed, 20 Apr 2022 16:54:43 +0530 [thread overview]
Message-ID: <20220420112450.155624-1-apatel@ventanamicro.com> (raw)
This series adds Sv57x4 support for KVM RISC-V G-stage and various
HFENCE related improvements.
These patches can also be found in riscv_kvm_sv57_plus_v2 branch at:
https://github.com/avpatel/linux.git
Changes since v1:
- Rebased on Linux-5.18-rc3
- Drop gstage_tlb_pgsize_bitmap and hfence_update_order() from PATCH4
because software is not required to know to page sizes supported by
TLB. In fact, it is responsibility of hardware implementation to
ensure that S/HFENCE on an address X invalidates all TLB entries
created for PTE covering address X.
- Added PATCH7 to cleanup stale TLB entries when VCPU is moved another
host CPU
Anup Patel (7):
RISC-V: KVM: Use G-stage name for hypervisor page table
RISC-V: KVM: Add Sv57x4 mode support for G-stage
RISC-V: KVM: Treat SBI HFENCE calls as NOPs
RISC-V: KVM: Introduce range based local HFENCE functions
RISC-V: KVM: Reduce KVM_MAX_VCPUS value
RISC-V: KVM: Add remote HFENCE functions based on VCPU requests
RISC-V: KVM: Cleanup stale TLB entries when host CPU changes
arch/riscv/include/asm/csr.h | 1 +
arch/riscv/include/asm/kvm_host.h | 124 ++++++--
arch/riscv/kvm/main.c | 11 +-
arch/riscv/kvm/mmu.c | 264 +++++++++--------
arch/riscv/kvm/tlb.S | 74 -----
arch/riscv/kvm/tlb.c | 461 ++++++++++++++++++++++++++++++
arch/riscv/kvm/vcpu.c | 45 ++-
arch/riscv/kvm/vcpu_exit.c | 6 +-
arch/riscv/kvm/vcpu_sbi_replace.c | 40 ++-
arch/riscv/kvm/vcpu_sbi_v01.c | 35 ++-
arch/riscv/kvm/vm.c | 8 +-
arch/riscv/kvm/vmid.c | 30 +-
12 files changed, 812 insertions(+), 287 deletions(-)
delete mode 100644 arch/riscv/kvm/tlb.S
create mode 100644 arch/riscv/kvm/tlb.c
--
2.25.1
next reply other threads:[~2022-04-20 11:25 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-20 11:24 Anup Patel [this message]
2022-04-20 11:24 ` [PATCH v2 1/7] RISC-V: KVM: Use G-stage name for hypervisor page table Anup Patel
2022-05-04 2:13 ` Atish Patra
2022-05-09 5:30 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 2/7] RISC-V: KVM: Add Sv57x4 mode support for G-stage Anup Patel
2022-05-04 2:14 ` Atish Patra
2022-05-09 5:31 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 3/7] RISC-V: KVM: Treat SBI HFENCE calls as NOPs Anup Patel
2022-05-04 2:14 ` Atish Patra
2022-05-09 5:32 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 4/7] RISC-V: KVM: Introduce range based local HFENCE functions Anup Patel
2022-05-06 6:49 ` Atish Patra
2022-05-09 5:33 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 5/7] RISC-V: KVM: Reduce KVM_MAX_VCPUS value Anup Patel
2022-05-04 2:15 ` Atish Patra
2022-05-09 5:33 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 6/7] RISC-V: KVM: Add remote HFENCE functions based on VCPU requests Anup Patel
2022-05-06 7:41 ` Atish Patra
2022-05-09 5:34 ` Anup Patel
2022-04-20 11:24 ` [PATCH v2 7/7] RISC-V: KVM: Cleanup stale TLB entries when host CPU changes Anup Patel
2022-05-06 7:53 ` Atish Patra
2022-05-09 5:34 ` Anup Patel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220420112450.155624-1-apatel@ventanamicro.com \
--to=apatel@ventanamicro.com \
--cc=Alistair.Francis@wdc.com \
--cc=anup@brainfault.org \
--cc=atishp@atishpatra.org \
--cc=kvm-riscv@lists.infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=pbonzini@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).