From: Robert Marko <robimarko@gmail.com>
To: agross@kernel.org, bjorn.andersson@linaro.org,
mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, absahu@codeaurora.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Cc: Robert Marko <robimarko@gmail.com>
Subject: [PATCH 5/7] clk: qcom: ipq8074: add PPE crypto clock
Date: Mon, 25 Apr 2022 20:22:47 +0200 [thread overview]
Message-ID: <20220425182249.2753690-5-robimarko@gmail.com> (raw)
In-Reply-To: <20220425182249.2753690-1-robimarko@gmail.com>
The built-in PPE engine has a dedicated clock for the EIP-197 crypto
engine.
So, since the required clock currently missing add support for it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/clk/qcom/gcc-ipq8074.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c
index 37af41d8b192..e6625b9fab35 100644
--- a/drivers/clk/qcom/gcc-ipq8074.c
+++ b/drivers/clk/qcom/gcc-ipq8074.c
@@ -3182,6 +3182,24 @@ static struct clk_branch gcc_nss_ptp_ref_clk = {
},
};
+static struct clk_branch gcc_crypto_ppe_clk = {
+ .halt_reg = 0x68310,
+ .halt_bit = 31,
+ .clkr = {
+ .enable_reg = 0x68310,
+ .enable_mask = BIT(0),
+ .hw.init = &(struct clk_init_data){
+ .name = "gcc_crypto_ppe_clk",
+ .parent_names = (const char *[]){
+ "nss_ppe_clk_src"
+ },
+ .num_parents = 1,
+ .flags = CLK_SET_RATE_PARENT,
+ .ops = &clk_branch2_ops,
+ },
+ },
+};
+
static struct clk_branch gcc_nssnoc_ce_apb_clk = {
.halt_reg = 0x6830c,
.clkr = {
@@ -4644,6 +4662,7 @@ static struct clk_regmap *gcc_ipq8074_clks[] = {
[GCC_PCIE0_RCHNG_CLK_SRC] = &pcie0_rchng_clk_src.clkr,
[GCC_PCIE0_RCHNG_CLK] = &gcc_pcie0_rchng_clk.clkr,
[GCC_PCIE0_AXI_S_BRIDGE_CLK] = &gcc_pcie0_axi_s_bridge_clk.clkr,
+ [GCC_CRYPTO_PPE_CLK] = &gcc_crypto_ppe_clk.clkr,
};
static const struct qcom_reset_map gcc_ipq8074_resets[] = {
--
2.35.1
next prev parent reply other threads:[~2022-04-25 18:23 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-25 18:22 [PATCH 1/7] clk: qcom: ipq8074: fix NSS core PLL-s Robert Marko
2022-04-25 18:22 ` [PATCH 2/7] clk: qcom: ipq8074: disable USB GDSC-s SW_COLLAPSE Robert Marko
2022-05-06 3:33 ` Bjorn Andersson
2022-05-06 21:54 ` Robert Marko
2022-04-25 18:22 ` [PATCH 3/7] clk: qcom: ipq8074: SW workaround for UBI32 PLL lock Robert Marko
2022-04-25 18:22 ` [PATCH 4/7] clk: qcom: ipq8074: fix NSS port frequency tables Robert Marko
2022-04-25 18:22 ` Robert Marko [this message]
2022-04-25 18:22 ` [PATCH 6/7] dt-bindings: clock: qcom: ipq8074: add PPE crypto clock Robert Marko
2022-04-25 18:49 ` Krzysztof Kozlowski
2022-04-25 18:22 ` [PATCH 7/7] clk: qcom: ipq8074: set BRANCH_HALT_DELAY flag for UBI clocks Robert Marko
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