From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Kan Liang <kan.liang@linux.intel.com>,
Xing Zhengjun <zhengjun.xing@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
John Garry <john.garry@huawei.com>,
James Clark <james.clark@arm.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org
Cc: Ian Rogers <irogers@google.com>
Subject: [PATCH 7/7] perf vendor events intel: Update WSM-EX events to v3
Date: Thu, 28 Apr 2022 00:57:30 -0700 [thread overview]
Message-ID: <20220428075730.797727-7-irogers@google.com> (raw)
In-Reply-To: <20220428075730.797727-1-irogers@google.com>
Events are generated for Westmere EX v3 with events from:
https://download.01.org/perfmon/WSM-EX/
Using the scripts at:
https://github.com/intel/event-converter-for-linux-perf/
This change updates descriptions.
Signed-off-by: Ian Rogers <irogers@google.com>
---
.../perf/pmu-events/arch/x86/westmereex/cache.json | 14 +++++++-------
.../pmu-events/arch/x86/westmereex/memory.json | 6 +++---
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/westmereex/cache.json b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
index 23de93ea347a..d6243d008bfe 100644
--- a/tools/perf/pmu-events/arch/x86/westmereex/cache.json
+++ b/tools/perf/pmu-events/arch/x86/westmereex/cache.json
@@ -1761,7 +1761,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches satisfied by the IO, CSR, MMIO unit",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the IO, CSR, MMIO unit",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.IO_CSR_MMIO",
@@ -1772,7 +1772,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches statisfied by the LLC and not found in a sibling core",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the LLC and not found in a sibling core",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_NO_OTHER_CORE",
@@ -1783,7 +1783,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches satisfied by the LLC and HIT in a sibling core",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the LLC and HIT in a sibling core",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_OTHER_CORE_HIT",
@@ -1794,7 +1794,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches satisfied by the LLC and HITM in a sibling core",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the LLC and HITM in a sibling core",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.LLC_HIT_OTHER_CORE_HITM",
@@ -1849,7 +1849,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches that HIT in a remote cache",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches that HIT in a remote cache",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_CACHE_HIT",
@@ -1860,7 +1860,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches that HITM in a remote cache",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches that HITM in a remote cache",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_CACHE_HITM",
@@ -3222,4 +3222,4 @@
"SampleAfterValue": "200000",
"UMask": "0x8"
}
-]
\ No newline at end of file
+]
diff --git a/tools/perf/pmu-events/arch/x86/westmereex/memory.json b/tools/perf/pmu-events/arch/x86/westmereex/memory.json
index a2132858b9c1..1f8cfabe08c0 100644
--- a/tools/perf/pmu-events/arch/x86/westmereex/memory.json
+++ b/tools/perf/pmu-events/arch/x86/westmereex/memory.json
@@ -294,7 +294,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches statisfied by the local DRAM.",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the local DRAM.",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.LOCAL_DRAM",
@@ -305,7 +305,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Offcore data reads, RFO's and prefetches statisfied by the remote DRAM",
+ "BriefDescription": "Offcore data reads, RFOs, and prefetches satisfied by the remote DRAM",
"Counter": "2",
"EventCode": "0xB7",
"EventName": "OFFCORE_RESPONSE.DATA_IN.REMOTE_DRAM",
@@ -744,4 +744,4 @@
"SampleAfterValue": "100000",
"UMask": "0x1"
}
-]
\ No newline at end of file
+]
--
2.36.0.464.gb9c8b46e94-goog
next prev parent reply other threads:[~2022-04-28 7:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-28 7:57 [PATCH 1/7] perf vendor events intel: Update CLX events to v1.15 Ian Rogers
2022-04-28 7:57 ` [PATCH 2/7] perf vendor events intel: Update ICL events to v1.13 Ian Rogers
2022-04-28 7:57 ` [PATCH 3/7] perf vendor events intel: Update IVT events to v21 Ian Rogers
2022-04-28 7:57 ` [PATCH 4/7] perf vendor events intel: Update SKL events to v53 Ian Rogers
2022-04-28 7:57 ` [PATCH 5/7] perf vendor events intel: Update SKX events to v1.27 Ian Rogers
2022-04-28 7:57 ` [PATCH 6/7] perf vendor events intel: Update WSM-EP-SP events to v3 Ian Rogers
2022-04-28 7:57 ` Ian Rogers [this message]
2022-04-28 13:12 ` [PATCH 1/7] perf vendor events intel: Update CLX events to v1.15 Liang, Kan
2022-04-28 13:31 ` Arnaldo Carvalho de Melo
2022-05-03 19:47 ` Ian Rogers
2022-05-04 15:50 ` Arnaldo Carvalho de Melo
2022-05-04 15:53 ` Arnaldo Carvalho de Melo
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