From: <alexandru.tachici@analog.com>
To: <andrew@lunn.ch>
Cc: <o.rempel@pengutronix.de>, <alexandru.tachici@analog.com>,
<davem@davemloft.net>, <devicetree@vger.kernel.org>,
<hkallweit1@gmail.com>, <kuba@kernel.org>,
<linux-kernel@vger.kernel.org>, <linux@armlinux.org.uk>,
<netdev@vger.kernel.org>, <robh+dt@kernel.org>
Subject: [PATCH v7 3/7] net: phy: Add BaseT1 auto-negotiation registers
Date: Fri, 29 Apr 2022 18:34:33 +0300 [thread overview]
Message-ID: <20220429153437.80087-4-alexandru.tachici@analog.com> (raw)
In-Reply-To: <20220429153437.80087-1-alexandru.tachici@analog.com>
From: Alexandru Tachici <alexandru.tachici@analog.com>
Added BASE-T1 AN advertisement register (Registers 7.514, 7.515, and
7.516) and BASE-T1 AN LP Base Page ability register (Registers 7.517,
7.518, and 7.519).
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Alexandru Tachici <alexandru.tachici@analog.com>
---
include/uapi/linux/mdio.h | 40 +++++++++++++++++++++++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 0b2eba36dd7c..fa3515257f54 100644
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -70,6 +70,14 @@
#define MDIO_B10L_PMA_CTRL 2294 /* 10BASE-T1L PMA control */
#define MDIO_PMA_10T1L_STAT 2295 /* 10BASE-T1L PMA status */
#define MDIO_PCS_10T1L_CTRL 2278 /* 10BASE-T1L PCS control */
+#define MDIO_AN_T1_CTRL 512 /* BASE-T1 AN control */
+#define MDIO_AN_T1_STAT 513 /* BASE-T1 AN status */
+#define MDIO_AN_T1_ADV_L 514 /* BASE-T1 AN advertisement register [15:0] */
+#define MDIO_AN_T1_ADV_M 515 /* BASE-T1 AN advertisement register [31:16] */
+#define MDIO_AN_T1_ADV_H 516 /* BASE-T1 AN advertisement register [47:32] */
+#define MDIO_AN_T1_LP_L 517 /* BASE-T1 AN LP Base Page ability register [15:0] */
+#define MDIO_AN_T1_LP_M 518 /* BASE-T1 AN LP Base Page ability register [31:16] */
+#define MDIO_AN_T1_LP_H 519 /* BASE-T1 AN LP Base Page ability register [47:32] */
/* LASI (Link Alarm Status Interrupt) registers, defined by XENPAK MSA. */
#define MDIO_PMA_LASI_RXCTRL 0x9000 /* RX_ALARM control */
@@ -293,6 +301,38 @@
#define MDIO_PCS_10T1L_CTRL_LB 0x4000 /* Enable PCS level loopback mode */
#define MDIO_PCS_10T1L_CTRL_RESET 0x8000 /* PCS reset */
+/* BASE-T1 auto-negotiation advertisement register [15:0] */
+#define MDIO_AN_T1_ADV_L_PAUSE_CAP ADVERTISE_PAUSE_CAP
+#define MDIO_AN_T1_ADV_L_PAUSE_ASYM ADVERTISE_PAUSE_ASYM
+#define MDIO_AN_T1_ADV_L_FORCE_MS 0x1000 /* Force Master/slave Configuration */
+#define MDIO_AN_T1_ADV_L_REMOTE_FAULT ADVERTISE_RFAULT
+#define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK
+#define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE
+
+/* BASE-T1 auto-negotiation advertisement register [31:16] */
+#define MDIO_AN_T1_ADV_M_B10L 0x4000 /* device is compatible with 10BASE-T1L */
+#define MDIO_AN_T1_ADV_M_MST 0x0010 /* advertise master preference */
+
+/* BASE-T1 auto-negotiation advertisement register [47:32] */
+#define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level Transmit Request */
+#define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level Transmit Ability */
+
+/* BASE-T1 AN LP Base Page ability register [15:0] */
+#define MDIO_AN_T1_LP_L_PAUSE_CAP LPA_PAUSE_CAP
+#define MDIO_AN_T1_LP_L_PAUSE_ASYM LPA_PAUSE_ASYM
+#define MDIO_AN_T1_LP_L_FORCE_MS 0x1000 /* LP Force Master/slave Configuration */
+#define MDIO_AN_T1_LP_L_REMOTE_FAULT LPA_RFAULT
+#define MDIO_AN_T1_LP_L_ACK LPA_LPACK
+#define MDIO_AN_T1_LP_L_NEXT_PAGE_REQ LPA_NPAGE
+
+/* BASE-T1 AN LP Base Page ability register [31:16] */
+#define MDIO_AN_T1_LP_M_MST 0x0010 /* LP master preference */
+#define MDIO_AN_T1_LP_M_B10L 0x4000 /* LP is compatible with 10BASE-T1L */
+
+/* BASE-T1 AN LP Base Page ability register [47:32] */
+#define MDIO_AN_T1_LP_H_10L_TX_HI_REQ 0x1000 /* 10BASE-T1L High Level LP Transmit Request */
+#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000 /* 10BASE-T1L High Level LP Transmit Ability */
+
/* EEE Supported/Advertisement/LP Advertisement registers.
*
* EEE capability Register (3.20), Advertisement (7.60) and
--
2.25.1
next prev parent reply other threads:[~2022-04-29 15:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-29 15:34 [PATCH v7 0/7] net: phy: adin1100: Add initial support for ADIN1100 industrial PHY alexandru.tachici
2022-04-29 15:34 ` [PATCH v7 1/7] ethtool: Add 10base-T1L link mode entry alexandru.tachici
2022-04-29 15:34 ` [PATCH v7 2/7] net: phy: Add 10-BaseT1L registers alexandru.tachici
2022-04-29 15:34 ` alexandru.tachici [this message]
2022-04-29 15:34 ` [PATCH v7 4/7] net: phy: Add 10BASE-T1L support in phy-c45 alexandru.tachici
2022-04-29 15:34 ` [PATCH v7 5/7] net: phy: adin1100: Add initial support for ADIN1100 industrial PHY alexandru.tachici
2022-04-29 15:34 ` [PATCH v7 6/7] net: phy: adin1100: Add SQI support alexandru.tachici
2022-04-29 15:34 ` [PATCH v7 7/7] dt-bindings: net: phy: Add 10-baseT1L 2.4 Vpp alexandru.tachici
2022-05-01 19:40 ` [PATCH v7 0/7] net: phy: adin1100: Add initial support for ADIN1100 industrial PHY patchwork-bot+netdevbpf
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