* [PATCH 0/8] Add support for MHI Endpoint function driver
@ 2022-05-02 6:06 Manivannan Sadhasivam
2022-05-02 6:06 ` [PATCH 1/8] PCI: endpoint: Pass EPF device ID to the probe function Manivannan Sadhasivam
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw)
To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh
Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam
Hello,
This series adds support for Modem Host Interface (MHI) Endpoint function
driver and few updates to the PCI endpoint core.
MHI
===
MHI is the communication protocol used by the host machines to control and
communicate with the Qualcomm modems/WLAN devices over any high speed physical
bus like PCIe. In Linux kernel, MHI is modeled as a bus driver [1] and there
are two instances of MHI used in a typical setup.
1. MHI host - MHI implementation for the host machines like x86/ARM64.
2. MHI Endpoint - MHI implementation for the endpoint devices like modems.
MHI EPF
=======
The MHI Endpoint function driver (MHI EPF) is used on the MHI endpoint devices
like modems. The MHI EPF driver sits in between the PCIe RC and MHI EP bus and
carries out all of the PCIe related activities like BAR config, PCIe Event
handling, MMIO read/write etc,... for the MHI EP bus.
Below is the simple representation of the setup:
+----------------------------------------------------+
| Endpoint CPU |
| |
+------------+ | +------------+ +-----------+ +-----------+ |
| | | | | | | | | |
| | | | MHI EP | | | | | | PCIe Bus
| Modem DSP +---+---+ Bus +---+ MHI EPF +---+ PCIe RC +---+---------
| | | | | | | | | |
| | | | | | | | | |
+------------+ | +------------+ +-----------+ +-----------+ |
| |
| |
+----------------------------------------------------+
The data packets will be read from the Modem DSP by the MHI stack and will be
transmitted to the host machine over PCIe bus with the help of MHI EPF driver.
Test setup
==========
This series has been tested on Snapdragon X55 modem a.k.a SDX55 connected to
the ARM64 host machine.
Dependency
==========
This series has the build dependency with the recently merged MHI EP bus [2]
support for v5.19.
Thanks,
Mani
[1] https://www.kernel.org/doc/html/latest/mhi/mhi.html
[2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/drivers/bus/mhi/ep
Manivannan Sadhasivam (8):
PCI: endpoint: Pass EPF device ID to the probe function
PCI: endpoint: Warn and return if EPC is started/stopped multiple
times
PCI: endpoint: Add an API for unregistering the EPF notifier
PCI: endpoint: Add linkdown notifier support
PCI: endpoint: Add BME notifier support
PCI: qcom-ep: Add support for Link down notification
PCI: qcom-ep: Add support for BME notification
PCI: endpoint: Add PCI Endpoint function driver for MHI bus
drivers/pci/controller/dwc/pcie-qcom-ep.c | 2 +
drivers/pci/endpoint/functions/Kconfig | 10 +
drivers/pci/endpoint/functions/Makefile | 1 +
drivers/pci/endpoint/functions/pci-epf-mhi.c | 436 ++++++++++++++++++
drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 +-
drivers/pci/endpoint/functions/pci-epf-test.c | 2 +-
drivers/pci/endpoint/pci-ep-cfs.c | 3 +
drivers/pci/endpoint/pci-epc-core.c | 34 ++
drivers/pci/endpoint/pci-epf-core.c | 8 +-
include/linux/pci-epc.h | 8 +
include/linux/pci-epf.h | 6 +-
11 files changed, 507 insertions(+), 6 deletions(-)
create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c
base-commit: c268c0a8a33047cd957fecc1349d09a68eb6ad9e
prerequisite-patch-id: 1578725693279d018290ef496258dbe825785192
--
2.25.1
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH 1/8] PCI: endpoint: Pass EPF device ID to the probe function 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 2/8] PCI: endpoint: Warn and return if EPC is started/stopped multiple times Manivannan Sadhasivam ` (6 subsequent siblings) 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Currently, the EPF probe function doesn't get the device ID argument needed to correctly identify the device table ID of the EPF device. When multiple entries are added to the "struct pci_epf_device_id" table, the probe function needs to identify the correct one. And the only way to do so is by storing the correct device ID in "struct pci_epf" during "pci_epf_match_id()" and passing that to probe(). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/endpoint/functions/pci-epf-ntb.c | 3 ++- drivers/pci/endpoint/functions/pci-epf-test.c | 2 +- drivers/pci/endpoint/pci-epf-core.c | 8 +++++--- include/linux/pci-epf.h | 4 +++- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/drivers/pci/endpoint/functions/pci-epf-ntb.c b/drivers/pci/endpoint/functions/pci-epf-ntb.c index 9a00448c7e61..980b4ecf19a2 100644 --- a/drivers/pci/endpoint/functions/pci-epf-ntb.c +++ b/drivers/pci/endpoint/functions/pci-epf-ntb.c @@ -2075,11 +2075,12 @@ static struct config_group *epf_ntb_add_cfs(struct pci_epf *epf, /** * epf_ntb_probe() - Probe NTB function driver * @epf: NTB endpoint function device + * @id: NTB endpoint function device ID * * Probe NTB function driver when endpoint function bus detects a NTB * endpoint function. */ -static int epf_ntb_probe(struct pci_epf *epf) +static int epf_ntb_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct epf_ntb *ntb; struct device *dev; diff --git a/drivers/pci/endpoint/functions/pci-epf-test.c b/drivers/pci/endpoint/functions/pci-epf-test.c index 5b833f00e980..f82b52e07621 100644 --- a/drivers/pci/endpoint/functions/pci-epf-test.c +++ b/drivers/pci/endpoint/functions/pci-epf-test.c @@ -901,7 +901,7 @@ static const struct pci_epf_device_id pci_epf_test_ids[] = { {}, }; -static int pci_epf_test_probe(struct pci_epf *epf) +static int pci_epf_test_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) { struct pci_epf_test *epf_test; struct device *dev = &epf->dev; diff --git a/drivers/pci/endpoint/pci-epf-core.c b/drivers/pci/endpoint/pci-epf-core.c index 9ed556936f48..0882ac829e95 100644 --- a/drivers/pci/endpoint/pci-epf-core.c +++ b/drivers/pci/endpoint/pci-epf-core.c @@ -494,11 +494,13 @@ static const struct device_type pci_epf_type = { }; static int -pci_epf_match_id(const struct pci_epf_device_id *id, const struct pci_epf *epf) +pci_epf_match_id(const struct pci_epf_device_id *id, struct pci_epf *epf) { while (id->name[0]) { - if (strcmp(epf->name, id->name) == 0) + if (strcmp(epf->name, id->name) == 0) { + epf->id = id; return true; + } id++; } @@ -526,7 +528,7 @@ static int pci_epf_device_probe(struct device *dev) epf->driver = driver; - return driver->probe(epf); + return driver->probe(epf, epf->id); } static void pci_epf_device_remove(struct device *dev) diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 009a07147c61..0c94cc1513bc 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -84,7 +84,7 @@ struct pci_epf_ops { * @id_table: identifies EPF devices for probing */ struct pci_epf_driver { - int (*probe)(struct pci_epf *epf); + int (*probe)(struct pci_epf *epf, const struct pci_epf_device_id *id); void (*remove)(struct pci_epf *epf); struct device_driver driver; @@ -126,6 +126,7 @@ struct pci_epf_bar { * @epc: the EPC device to which this EPF device is bound * @epf_pf: the physical EPF device to which this virtual EPF device is bound * @driver: the EPF driver to which this EPF device is bound + * @id: Pointer to the EPF device ID * @list: to add pci_epf as a list of PCI endpoint functions to pci_epc * @nb: notifier block to notify EPF of any EPC events (like linkup) * @lock: mutex to protect pci_epf_ops @@ -153,6 +154,7 @@ struct pci_epf { struct pci_epc *epc; struct pci_epf *epf_pf; struct pci_epf_driver *driver; + const struct pci_epf_device_id *id; struct list_head list; struct notifier_block nb; /* mutex to protect against concurrent access of pci_epf_ops */ -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 2/8] PCI: endpoint: Warn and return if EPC is started/stopped multiple times 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 1/8] PCI: endpoint: Pass EPF device ID to the probe function Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 3/8] PCI: endpoint: Add an API for unregistering the EPF notifier Manivannan Sadhasivam ` (5 subsequent siblings) 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam When the EPC is started or stopped multiple times from configfs, just emit a once time warning and return. There is no need to call the EPC start/stop functions in those cases. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/endpoint/pci-ep-cfs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/endpoint/pci-ep-cfs.c b/drivers/pci/endpoint/pci-ep-cfs.c index d4850bdd837f..2cfd5fd2794c 100644 --- a/drivers/pci/endpoint/pci-ep-cfs.c +++ b/drivers/pci/endpoint/pci-ep-cfs.c @@ -178,6 +178,9 @@ static ssize_t pci_epc_start_store(struct config_item *item, const char *page, if (kstrtobool(page, &start) < 0) return -EINVAL; + if (WARN_ON_ONCE(start == epc_group->start)) + return 0; + if (!start) { pci_epc_stop(epc); epc_group->start = 0; -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 3/8] PCI: endpoint: Add an API for unregistering the EPF notifier 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 1/8] PCI: endpoint: Pass EPF device ID to the probe function Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 2/8] PCI: endpoint: Warn and return if EPC is started/stopped multiple times Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 4/8] PCI: endpoint: Add linkdown notifier support Manivannan Sadhasivam ` (4 subsequent siblings) 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add "pci_epc_unregister_notifier()" to unregister the notifier added between EPC and EPF. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- include/linux/pci-epc.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index a48778e1a4ee..c414a08bfd67 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -198,6 +198,12 @@ pci_epc_register_notifier(struct pci_epc *epc, struct notifier_block *nb) return atomic_notifier_chain_register(&epc->notifier, nb); } +static inline int +pci_epc_unregister_notifier(struct pci_epc *epc, struct notifier_block *nb) +{ + return atomic_notifier_chain_unregister(&epc->notifier, nb); +} + struct pci_epc * __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops, struct module *owner); -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 4/8] PCI: endpoint: Add linkdown notifier support 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam ` (2 preceding siblings ...) 2022-05-02 6:06 ` [PATCH 3/8] PCI: endpoint: Add an API for unregistering the EPF notifier Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 5/8] PCI: endpoint: Add BME " Manivannan Sadhasivam ` (3 subsequent siblings) 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add support to notify the EPF device about the linkdown event from the EPC device. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/endpoint/pci-epc-core.c | 17 +++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 1 + 3 files changed, 19 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 3bc9273d0a08..8401c2750c9e 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -697,6 +697,23 @@ void pci_epc_linkup(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_linkup); +/** + * pci_epc_linkdown() - Notify the EPF device that EPC device has dropped the + * connection with the Root Complex. + * @epc: the EPC device which has dropped the link with the host + * + * Invoke to Notify the EPF device that the EPC device has dropped the + * connection with the Root Complex. + */ +void pci_epc_linkdown(struct pci_epc *epc) +{ + if (!epc || IS_ERR(epc)) + return; + + atomic_notifier_call_chain(&epc->notifier, LINK_DOWN, NULL); +} +EXPORT_SYMBOL_GPL(pci_epc_linkdown); + /** * pci_epc_init_notify() - Notify the EPF device that EPC device's core * initialization is completed. diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index c414a08bfd67..d346ab9ae061 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -215,6 +215,7 @@ void pci_epc_destroy(struct pci_epc *epc); int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); void pci_epc_linkup(struct pci_epc *epc); +void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index 0c94cc1513bc..b1fcd88d0b1f 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -20,6 +20,7 @@ enum pci_epc_interface_type; enum pci_notify_event { CORE_INIT, LINK_UP, + LINK_DOWN, }; enum pci_barno { -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 5/8] PCI: endpoint: Add BME notifier support 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam ` (3 preceding siblings ...) 2022-05-02 6:06 ` [PATCH 4/8] PCI: endpoint: Add linkdown notifier support Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 6/8] PCI: qcom-ep: Add support for Link down notification Manivannan Sadhasivam ` (2 subsequent siblings) 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add support to notify the EPF device about the Bus Master Enable (BME) event received by the EPC device from the Root complex. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/endpoint/pci-epc-core.c | 17 +++++++++++++++++ include/linux/pci-epc.h | 1 + include/linux/pci-epf.h | 1 + 3 files changed, 19 insertions(+) diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index 8401c2750c9e..6120d99bff73 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -731,6 +731,23 @@ void pci_epc_init_notify(struct pci_epc *epc) } EXPORT_SYMBOL_GPL(pci_epc_init_notify); +/** + * pci_epc_bme_notify() - Notify the EPF device that the EPC device has received + * the BME event from the Root complex + * @epc: the EPC device that received the BME event + * + * Invoke to Notify the EPF device that the EPC device has received the Bus + * Master Enable (BME) event from the Root complex + */ +void pci_epc_bme_notify(struct pci_epc *epc) +{ + if (!epc || IS_ERR(epc)) + return; + + atomic_notifier_call_chain(&epc->notifier, BME, NULL); +} +EXPORT_SYMBOL_GPL(pci_epc_bme_notify); + /** * pci_epc_destroy() - destroy the EPC device * @epc: the EPC device that has to be destroyed diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index d346ab9ae061..8454610df4c3 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -217,6 +217,7 @@ int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf, void pci_epc_linkup(struct pci_epc *epc); void pci_epc_linkdown(struct pci_epc *epc); void pci_epc_init_notify(struct pci_epc *epc); +void pci_epc_bme_notify(struct pci_epc *epc); void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf, enum pci_epc_interface_type type); int pci_epc_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no, diff --git a/include/linux/pci-epf.h b/include/linux/pci-epf.h index b1fcd88d0b1f..e03c57129ed5 100644 --- a/include/linux/pci-epf.h +++ b/include/linux/pci-epf.h @@ -21,6 +21,7 @@ enum pci_notify_event { CORE_INIT, LINK_UP, LINK_DOWN, + BME, }; enum pci_barno { -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 6/8] PCI: qcom-ep: Add support for Link down notification 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam ` (4 preceding siblings ...) 2022-05-02 6:06 ` [PATCH 5/8] PCI: endpoint: Add BME " Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 7/8] PCI: qcom-ep: Add support for BME notification Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 8/8] PCI: endpoint: Add PCI Endpoint function driver for MHI bus Manivannan Sadhasivam 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add support to pass Link down notification to Endpoint function driver so that the LINK_DOWN event can be processed by the function. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 6ce8eddf3a37..9fb6e960f73d 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -497,6 +497,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) if (FIELD_GET(PARF_INT_ALL_LINK_DOWN, status)) { dev_dbg(dev, "Received Linkdown event\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_DOWN; + pci_epc_linkdown(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 7/8] PCI: qcom-ep: Add support for BME notification 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam ` (5 preceding siblings ...) 2022-05-02 6:06 ` [PATCH 6/8] PCI: qcom-ep: Add support for Link down notification Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 8/8] PCI: endpoint: Add PCI Endpoint function driver for MHI bus Manivannan Sadhasivam 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add support to pass BME (Bus Master Enable) notification to Endpoint function driver so that the BME event can be processed by the function. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 9fb6e960f73d..67ec52ad87bd 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -501,6 +501,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data) } else if (FIELD_GET(PARF_INT_ALL_BME, status)) { dev_dbg(dev, "Received BME event. Link is enabled!\n"); pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED; + pci_epc_bme_notify(pci->ep.epc); } else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) { dev_dbg(dev, "Received PM Turn-off event! Entering L23\n"); val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL); -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH 8/8] PCI: endpoint: Add PCI Endpoint function driver for MHI bus 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam ` (6 preceding siblings ...) 2022-05-02 6:06 ` [PATCH 7/8] PCI: qcom-ep: Add support for BME notification Manivannan Sadhasivam @ 2022-05-02 6:06 ` Manivannan Sadhasivam 7 siblings, 0 replies; 9+ messages in thread From: Manivannan Sadhasivam @ 2022-05-02 6:06 UTC (permalink / raw) To: kishon, lorenzo.pieralisi, kw, bhelgaas, robh Cc: linux-pci, linux-arm-msm, linux-kernel, Manivannan Sadhasivam Add PCI Endpoint driver for the Qualcomm MHI (Modem Host Interface) bus. The driver implements the MHI function over PCI in the endpoint device such as SDX55 modem. The MHI endpoint function driver acts as a controller driver for the MHI Endpoint stack and carries out all PCI related activities like mapping the host memory using iATU, triggering MSIs etc... Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- drivers/pci/endpoint/functions/Kconfig | 10 + drivers/pci/endpoint/functions/Makefile | 1 + drivers/pci/endpoint/functions/pci-epf-mhi.c | 436 +++++++++++++++++++ 3 files changed, 447 insertions(+) create mode 100644 drivers/pci/endpoint/functions/pci-epf-mhi.c diff --git a/drivers/pci/endpoint/functions/Kconfig b/drivers/pci/endpoint/functions/Kconfig index 5f1242ca2f4e..93497fb70e31 100644 --- a/drivers/pci/endpoint/functions/Kconfig +++ b/drivers/pci/endpoint/functions/Kconfig @@ -25,3 +25,13 @@ config PCI_EPF_NTB device tree. If in doubt, say "N" to disable Endpoint NTB driver. + +config PCI_EPF_MHI + tristate "PCI Endpoint driver for MHI bus" + depends on PCI_ENDPOINT && MHI_BUS_EP + help + Enable this configuration option to enable the PCI Endpoint + driver for Modem Host Interface (MHI) bus found in Qualcomm + modems such as SDX55. + + If in doubt, say "N" to disable Endpoint driver for MHI bus. diff --git a/drivers/pci/endpoint/functions/Makefile b/drivers/pci/endpoint/functions/Makefile index 96ab932a537a..eee99b2e9103 100644 --- a/drivers/pci/endpoint/functions/Makefile +++ b/drivers/pci/endpoint/functions/Makefile @@ -5,3 +5,4 @@ obj-$(CONFIG_PCI_EPF_TEST) += pci-epf-test.o obj-$(CONFIG_PCI_EPF_NTB) += pci-epf-ntb.o +obj-$(CONFIG_PCI_EPF_MHI) += pci-epf-mhi.o diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c new file mode 100644 index 000000000000..a8119841a252 --- /dev/null +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -0,0 +1,436 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PCI EPF driver for MHI Endpoint devices + * + * Copyright (C) 2022 Linaro Ltd. + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + */ + +#include <linux/mhi_ep.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pci-epc.h> +#include <linux/pci-epf.h> + +#define MHI_VERSION_1_0 0x01000000 + +struct pci_epf_mhi_ep_info { + const struct mhi_ep_cntrl_config *config; + struct pci_epf_header *epf_header; + enum pci_barno bar_num; + u32 epf_flags; + u32 msi_count; + u32 mru; +}; + +#define MHI_EP_CHANNEL_CONFIG_UL(ch_num, ch_name) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .dir = DMA_TO_DEVICE, \ + } + +#define MHI_EP_CHANNEL_CONFIG_DL(ch_num, ch_name) \ + { \ + .num = ch_num, \ + .name = ch_name, \ + .dir = DMA_FROM_DEVICE, \ + } + +static const struct mhi_ep_channel_config mhi_v1_channels[] = { + MHI_EP_CHANNEL_CONFIG_UL(0, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_DL(1, "LOOPBACK"), + MHI_EP_CHANNEL_CONFIG_UL(2, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_DL(3, "SAHARA"), + MHI_EP_CHANNEL_CONFIG_UL(4, "DIAG"), + MHI_EP_CHANNEL_CONFIG_DL(5, "DIAG"), + MHI_EP_CHANNEL_CONFIG_UL(6, "SSR"), + MHI_EP_CHANNEL_CONFIG_DL(7, "SSR"), + MHI_EP_CHANNEL_CONFIG_UL(8, "QDSS"), + MHI_EP_CHANNEL_CONFIG_DL(9, "QDSS"), + MHI_EP_CHANNEL_CONFIG_UL(10, "EFS"), + MHI_EP_CHANNEL_CONFIG_DL(11, "EFS"), + MHI_EP_CHANNEL_CONFIG_UL(12, "MBIM"), + MHI_EP_CHANNEL_CONFIG_DL(13, "MBIM"), + MHI_EP_CHANNEL_CONFIG_UL(14, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(15, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(16, "QMI"), + MHI_EP_CHANNEL_CONFIG_DL(17, "QMI"), + MHI_EP_CHANNEL_CONFIG_UL(18, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_DL(19, "IP-CTRL-1"), + MHI_EP_CHANNEL_CONFIG_UL(20, "IPCR"), + MHI_EP_CHANNEL_CONFIG_DL(21, "IPCR"), + MHI_EP_CHANNEL_CONFIG_UL(32, "DUN"), + MHI_EP_CHANNEL_CONFIG_DL(33, "DUN"), + MHI_EP_CHANNEL_CONFIG_UL(36, "IP_SW0"), + MHI_EP_CHANNEL_CONFIG_DL(37, "IP_SW0"), +}; + +static const struct mhi_ep_cntrl_config mhi_v1_config = { + .max_channels = 128, + .num_channels = ARRAY_SIZE(mhi_v1_channels), + .ch_cfg = mhi_v1_channels, + .mhi_version = MHI_VERSION_1_0, +}; + +static struct pci_epf_header sdx55_header = { + .vendorid = PCI_VENDOR_ID_QCOM, + .deviceid = 0x0306, + .baseclass_code = PCI_BASE_CLASS_COMMUNICATION, + .subclass_code = PCI_CLASS_COMMUNICATION_MODEM & 0xff, + .interrupt_pin = PCI_INTERRUPT_INTA, +}; + +static const struct pci_epf_mhi_ep_info sdx55_info = { + .config = &mhi_v1_config, + .epf_header = &sdx55_header, + .bar_num = BAR_0, + .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32, + .msi_count = 32, + .mru = 0x8000, +}; + +struct pci_epf_mhi { + const struct pci_epf_mhi_ep_info *info; + struct mhi_ep_cntrl mhi_cntrl; + struct pci_epf *epf; + struct mutex lock; + void __iomem *mmio; + resource_size_t mmio_phys; + enum pci_notify_event event; + u32 mmio_size; + int irq; + bool mhi_registered; +}; + +static int pci_epf_mhi_alloc_map(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t *phys_ptr, void __iomem **virt, size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + void __iomem *virt_addr; + phys_addr_t phys_addr; + int ret; + + virt_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, size + offset); + if (!virt_addr) + return -ENOMEM; + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, phys_addr, pci_addr - offset, size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, phys_addr, virt_addr, size + offset); + + return ret; + } + + *phys_ptr = phys_addr + offset; + *virt = virt_addr + offset; + + return 0; +} + +static void pci_epf_mhi_unmap_free(struct mhi_ep_cntrl *mhi_cntrl, u64 pci_addr, + phys_addr_t phys_addr, void __iomem *virt_addr, size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + size_t offset = pci_addr & (epc->mem->window.page_size - 1); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, phys_addr - offset); + pci_epc_mem_free_addr(epc, phys_addr - offset, virt_addr - offset, size + offset); +} + +void pci_epf_mhi_raise_irq(struct mhi_ep_cntrl *mhi_cntrl, u32 vector) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + + /* + * Vector is incremented by 1 here as the DWC core will decrement it before + * writing to iATU. + */ + pci_epc_raise_irq(epc, epf->func_no, epf->vfunc_no, PCI_EPC_IRQ_MSI, vector + 1); +} + +int pci_epf_mhi_read_from_host(struct mhi_ep_cntrl *mhi_cntrl, u64 from, void __iomem *to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = from % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, from - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_fromio(to, tre_buf + offset, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +int pci_epf_mhi_write_to_host(struct mhi_ep_cntrl *mhi_cntrl, void __iomem *from, u64 to, + size_t size) +{ + struct pci_epf_mhi *epf_mhi = container_of(mhi_cntrl, struct pci_epf_mhi, mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf_mhi->epf->epc; + void __iomem *tre_buf; + phys_addr_t tre_phys; + size_t offset = to % 0x1000; + int ret; + + mutex_lock(&epf_mhi->lock); + + tre_buf = pci_epc_mem_alloc_addr(epc, &tre_phys, size + offset); + if (!tre_buf) { + mutex_unlock(&epf_mhi->lock); + return -ENOMEM; + } + + ret = pci_epc_map_addr(epc, epf->func_no, epf->vfunc_no, tre_phys, to - offset, + size + offset); + if (ret) { + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + mutex_unlock(&epf_mhi->lock); + return ret; + } + + memcpy_toio(tre_buf + offset, from, size); + + pci_epc_unmap_addr(epc, epf->func_no, epf->vfunc_no, tre_phys); + pci_epc_mem_free_addr(epc, tre_phys, tre_buf, size + offset); + + mutex_unlock(&epf_mhi->lock); + + return 0; +} + +static int pci_epf_mhi_notifier(struct notifier_block *nb, unsigned long val, void *data) +{ + struct pci_epf *epf = container_of(nb, struct pci_epf, nb); + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + struct device *dev = &epf->dev; + int ret; + + switch (val) { + case CORE_INIT: + epf_bar->phys_addr = epf_mhi->mmio_phys; + epf_bar->size = epf_mhi->mmio_size; + epf_bar->barno = info->bar_num; + epf_bar->flags = info->epf_flags; + ret = pci_epc_set_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); + if (ret) { + dev_err(dev, "Failed to set BAR: %d\n", ret); + return NOTIFY_BAD; + } + + ret = pci_epc_set_msi(epc, epf->func_no, epf->vfunc_no, + order_base_2(info->msi_count)); + if (ret) { + dev_err(dev, "Failed to set MSI configuration: %d\n", ret); + return NOTIFY_BAD; + } + + ret = pci_epc_write_header(epc, epf->func_no, epf->vfunc_no, epf->header); + if (ret) { + dev_err(dev, "Failed to set Configuration header: %d\n", ret); + return NOTIFY_BAD; + } + + break; + case LINK_UP: + mhi_cntrl->mmio = epf_mhi->mmio; + mhi_cntrl->irq = epf_mhi->irq; + mhi_cntrl->mru = info->mru; + + /* Assign the struct dev of PCI EP as MHI controller device */ + mhi_cntrl->cntrl_dev = epc->dev.parent; + mhi_cntrl->raise_irq = pci_epf_mhi_raise_irq; + mhi_cntrl->alloc_map = pci_epf_mhi_alloc_map; + mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free; + mhi_cntrl->read_from_host = pci_epf_mhi_read_from_host; + mhi_cntrl->write_to_host = pci_epf_mhi_write_to_host; + + /* Register the MHI EP controller */ + ret = mhi_ep_register_controller(mhi_cntrl, info->config); + if (ret) { + dev_err(dev, "Failed to register MHI EP controller: %d\n", ret); + return NOTIFY_BAD; + } + + epf_mhi->mhi_registered = true; + break; + case LINK_DOWN: + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + } + + break; + case BME: + /* Power up the MHI EP stack if link is up and stack is in power down state */ + if (!mhi_cntrl->enabled && epf_mhi->mhi_registered) { + ret = mhi_ep_power_up(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to power up MHI EP: %d\n", ret); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + return NOTIFY_BAD; + } + } + + break; + default: + dev_err(&epf->dev, "Invalid MHI EP notifier event: %d\n", epf_mhi->event); + return NOTIFY_BAD; + } + + return NOTIFY_OK; +} + +static int pci_epf_mhi_bind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + struct pci_epc *epc = epf->epc; + struct platform_device *pdev = to_platform_device(epc->dev.parent); + struct device *dev = &epf->dev; + struct resource *res; + int ret; + + if (WARN_ON_ONCE(!epc)) + return -EINVAL; + + /* Get MMIO base address from Endpoint controller */ + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mmio"); + epf_mhi->mmio_phys = res->start; + epf_mhi->mmio_size = resource_size(res); + + epf_mhi->mmio = ioremap_wc(epf_mhi->mmio_phys, epf_mhi->mmio_size); + if (IS_ERR(epf_mhi->mmio)) + return PTR_ERR(epf_mhi->mmio); + + ret = platform_get_irq_byname(pdev, "doorbell"); + if (ret < 0) { + dev_err(dev, "Failed to get Doorbell IRQ\n"); + iounmap(epf_mhi->mmio); + return ret; + } + + epf_mhi->irq = ret; + + epf->nb.notifier_call = pci_epf_mhi_notifier; + pci_epc_register_notifier(epc, &epf->nb); + + return 0; +} + +static void pci_epf_mhi_unbind(struct pci_epf *epf) +{ + struct pci_epf_mhi *epf_mhi = epf_get_drvdata(epf); + const struct pci_epf_mhi_ep_info *info = epf_mhi->info; + struct pci_epf_bar *epf_bar = &epf->bar[info->bar_num]; + struct mhi_ep_cntrl *mhi_cntrl = &epf_mhi->mhi_cntrl; + struct pci_epc *epc = epf->epc; + + pci_epc_unregister_notifier(epc, &epf->nb); + + /* + * Forcefully power down the MHI EP stack. Only way to bring the MHI EP stack + * back to working state after successive bind is by getting BME from host. + */ + if (epf_mhi->mhi_registered) { + mhi_ep_power_down(mhi_cntrl); + mhi_ep_unregister_controller(mhi_cntrl); + epf_mhi->mhi_registered = false; + } + + iounmap(epf_mhi->mmio); + pci_epc_clear_bar(epc, epf->func_no, epf->vfunc_no, epf_bar); +} + +static int pci_epf_mhi_probe(struct pci_epf *epf, const struct pci_epf_device_id *id) +{ + struct pci_epf_mhi_ep_info *info = (struct pci_epf_mhi_ep_info *) id->driver_data; + struct pci_epf_mhi *epf_mhi; + struct device *dev = &epf->dev; + + epf_mhi = devm_kzalloc(dev, sizeof(*epf_mhi), GFP_KERNEL); + if (!epf_mhi) + return -ENOMEM; + + epf->header = info->epf_header; + epf_mhi->info = info; + epf_mhi->epf = epf; + + mutex_init(&epf_mhi->lock); + + epf_set_drvdata(epf, epf_mhi); + + return 0; +} + +static const struct pci_epf_device_id pci_epf_mhi_ids[] = { + { + .name = "sdx55", .driver_data = (kernel_ulong_t) &sdx55_info, + }, + {}, +}; + +static struct pci_epf_ops pci_epf_mhi_ops = { + .unbind = pci_epf_mhi_unbind, + .bind = pci_epf_mhi_bind, +}; + +static struct pci_epf_driver pci_epf_mhi_driver = { + .driver.name = "pci_epf_mhi", + .probe = pci_epf_mhi_probe, + .id_table = pci_epf_mhi_ids, + .ops = &pci_epf_mhi_ops, + .owner = THIS_MODULE, +}; + +static int __init pci_epf_mhi_init(void) +{ + return pci_epf_register_driver(&pci_epf_mhi_driver); +} +module_init(pci_epf_mhi_init); + +static void __exit pci_epf_mhi_exit(void) +{ + pci_epf_unregister_driver(&pci_epf_mhi_driver); +} +module_exit(pci_epf_mhi_exit); + +MODULE_DESCRIPTION("PCI EPF driver for MHI Endpoint devices"); +MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>"); +MODULE_LICENSE("GPL v2"); -- 2.25.1 ^ permalink raw reply related [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-05-02 6:07 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-05-02 6:06 [PATCH 0/8] Add support for MHI Endpoint function driver Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 1/8] PCI: endpoint: Pass EPF device ID to the probe function Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 2/8] PCI: endpoint: Warn and return if EPC is started/stopped multiple times Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 3/8] PCI: endpoint: Add an API for unregistering the EPF notifier Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 4/8] PCI: endpoint: Add linkdown notifier support Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 5/8] PCI: endpoint: Add BME " Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 6/8] PCI: qcom-ep: Add support for Link down notification Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 7/8] PCI: qcom-ep: Add support for BME notification Manivannan Sadhasivam 2022-05-02 6:06 ` [PATCH 8/8] PCI: endpoint: Add PCI Endpoint function driver for MHI bus Manivannan Sadhasivam
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