From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D7EFC4332F for ; Mon, 2 May 2022 22:41:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376431AbiEBWpR (ORCPT ); Mon, 2 May 2022 18:45:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39402 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232426AbiEBWpG (ORCPT ); Mon, 2 May 2022 18:45:06 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84AF6E094; Mon, 2 May 2022 15:41:36 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 7C4FD22249; Tue, 3 May 2022 00:41:34 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1651531294; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vCEvTZ/O30k3nO+2jrdVl0gFAUtDTetFzbLFbAwJZ9U=; b=Yru9yPjkTzjCvK6SKv+ltY7J3LGhrxlX+MorSWJOPlQNKf8ClnNH1Z/vixt31wwaXz7Y4O sX/Uzdz45h2tXMX6zpCy2yFAlIZX8GvkjNMF6wznsbnGFWGKhgnI/BhETOAvUMwFe1gDXK nhSeQl5SGPZCXTbYs9zOIYbTA4AhW54= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Tudor.Ambarus@microchip.com, Horatiu Vultur , Michael Walle Subject: [PATCH v4 02/13] ARM: dts: lan966x: add sgpio node Date: Tue, 3 May 2022 00:41:16 +0200 Message-Id: <20220502224127.2604333-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220502224127.2604333-1-michael@walle.cc> References: <20220502224127.2604333-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the device tree node for the SGPIO IP block reused from the SparX-5. Keep the node disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index a99ffb4cfb8a..4c7beebbd1ef 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -223,6 +223,32 @@ gpio: pinctrl@e2004064 { #interrupt-cells = <2>; }; + sgpio: gpio@e2004190 { + compatible = "microchip,sparx5-sgpio"; + reg = <0xe2004190 0x118>; + clocks = <&sys_clk>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgpio_in: gpio@0 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <0>; + gpio-controller; + #gpio-cells = <3>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + + sgpio_out: gpio@1 { + compatible = "microchip,sparx5-sgpio-bank"; + reg = <1>; + gpio-controller; + #gpio-cells = <3>; + }; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,gic-400", "arm,cortex-a7-gic"; #interrupt-cells = <3>; -- 2.30.2