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From: Samuel Holland <samuel@sholland.org>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>
Cc: Samuel Holland <samuel@sholland.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Guo Ren <guoren@kernel.org>,
	Linus Walleij <linus.walleij@linaro.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Russell King <linux@armlinux.org.uk>,
	Wei Xu <xuwei5@hisilicon.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: [PATCH 0/5] genirq/irqchip: RISC-V PLIC cleanup and optimization
Date: Sun,  8 May 2022 22:43:28 -0500	[thread overview]
Message-ID: <20220509034333.60017-1-samuel@sholland.org> (raw)

This series removes the splinlocks and cpumask operations from the PLIC
driver's hot path. To do that, it first makes the IRQ affinity mask
behavior more consistent between uniprocessor and SMP configurations.
(The Allwinner D1 is a uniprocessor SoC containing a PLIC.)

A further optimization is to take advantage of the fact that multiple
IRQs can be claimed at once. This allows removing the mask operations
for oneshot IRQs -- i.e. the combination of IRQCHIP_ONESHOT_SAFE and
IRQCHIP_EOI_THREADED, which is not currently supported. I will send
this as a separate series, since it makes more invasive changes to the
generic IRQ code.


Samuel Holland (5):
  genirq: GENERIC_IRQ_EFFECTIVE_AFF_MASK depends on SMP
  genirq: Refactor accessors to use irq_data_get_affinity_mask
  genirq: Provide an IRQ affinity mask in non-SMP configs
  irqchip/sifive-plic: Make better use of the effective affinity mask
  irqchip/sifive-plic: Separate the enable and mask operations

 arch/arm/mach-hisi/Kconfig        |  2 +-
 drivers/irqchip/Kconfig           | 15 ++++----
 drivers/irqchip/irq-sifive-plic.c | 61 ++++++++++++++++---------------
 include/linux/irq.h               | 20 ++++++----
 kernel/irq/Kconfig                |  1 +
 5 files changed, 54 insertions(+), 45 deletions(-)

-- 
2.35.1


             reply	other threads:[~2022-05-09  3:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-09  3:43 Samuel Holland [this message]
2022-05-09  3:43 ` [PATCH 1/5] genirq: GENERIC_IRQ_EFFECTIVE_AFF_MASK depends on SMP Samuel Holland
2022-05-09  3:43 ` [PATCH 2/5] genirq: Refactor accessors to use irq_data_get_affinity_mask Samuel Holland
2022-05-09  3:43 ` [PATCH 3/5] genirq: Provide an IRQ affinity mask in non-SMP configs Samuel Holland
2022-05-09  7:52   ` kernel test robot
2022-05-10  4:20     ` Samuel Holland
2022-05-09  3:43 ` [PATCH 4/5] irqchip/sifive-plic: Make better use of the effective affinity mask Samuel Holland
2022-05-09  3:43 ` [PATCH 5/5] irqchip/sifive-plic: Separate the enable and mask operations Samuel Holland
2022-05-10 10:27   ` Marc Zyngier
2022-05-11 10:00     ` Samuel Holland

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