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Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org Subject: Re: [PATCH v3 2/2] ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board Message-ID: <20220513073849.cu4jzykefat2sepg@houat> References: <20220512071858.10805-1-qianfanguijin@163.com> <20220512071858.10805-2-qianfanguijin@163.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="zxcrkptjti3zcqyl" Content-Disposition: inline In-Reply-To: <20220512071858.10805-2-qianfanguijin@163.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --zxcrkptjti3zcqyl Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Thu, May 12, 2022 at 03:18:58PM +0800, qianfanguijin@163.com wrote: > From: qianfan Zhao >=20 > sun8i-r40 actived cpufreq feature now, let's add "cpu-supply" node on > board. >=20 > Signed-off-by: qianfan Zhao > --- > arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 4 ++++ > arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 4 ++++ > arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 4 ++++ > arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 4 ++++ > 4 files changed, 16 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm= /boot/dts/sun8i-r40-bananapi-m2-ultra.dts > index a6a1087a0c9b..4f30018ec4a2 100644 > --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts > +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts > @@ -113,6 +113,10 @@ &ahci { > status =3D "okay"; > }; > =20 > +&cpu0 { > + cpu-supply =3D <®_dcdc2>; > +}; > + This will break bisection on those boards. Indeed, you added the OPPs on the first patch, and if you only apply that patch, the boards in the second patch will be missing their CPU regulator. The kernel will then ramp up the frequency to the highest OPP, but will not change the voltage, resulting in a crash. There's a similar issue for all the boards that don't have a regulator in the first place. The way we worked around this for the other SoCs is to have a DTSI with the OPPs with a frequency higher than what U-Boot boots with (1008MHz?), and only include that DTSI on boards that have a CPU regulator hooked in. Maxime --zxcrkptjti3zcqyl Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCYn4LCQAKCRDj7w1vZxhR xUebAP9qYzZ/IfkEzAu15CJHZ6js7mUi6RdbUoNXxKfPggg5ogD+Ni0yIfCamB1z NywiFR5KnVB6qmwQCleCMfl/hditBQs= =5Se1 -----END PGP SIGNATURE----- --zxcrkptjti3zcqyl--