From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Bjorn Andersson <bjorn.andersson@linaro.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Lee Jones <lee.jones@linaro.org>,
Benson Leung <bleung@chromium.org>,
Guenter Roeck <groeck@chromium.org>,
Daisuke Nojiri <dnojiri@chromium.org>,
Sebastian Reichel <sebastian.reichel@collabora.com>,
"Dustin L. Howett" <dustin@howett.net>,
Tzung-Bi Shih <tzungbi@kernel.org>,
Tinghan Shen <tinghan.shen@mediatek.com>,
"Gustavo A. R. Silva" <gustavoars@kernel.org>,
Prashant Malani <pmalani@chromium.org>,
"Enric Balletbo i Serra" <enric.balletbo@collabora.com>,
Brian Norris <briannorris@chromium.org>
Cc: <linux-remoteproc@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <chrome-platform@lists.linux.dev>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
<weishunc@google.com>
Subject: [PATCH v1 03/15] remoteproc: mediatek: Support hanlding scp core 1 wdt timeout
Date: Wed, 1 Jun 2022 19:21:49 +0800 [thread overview]
Message-ID: <20220601112201.15510-4-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220601112201.15510-1-tinghan.shen@mediatek.com>
MT8195 SCP is a dual-core processor. The SCP core 1 watchdog timeout
interrupt uses the same interrupt line of SCP core 0 watchdog timeout
interrupt.
Add support for handling SCP core 1 watchdog timeout interrupt in the
SCP IRQ handler.
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
---
drivers/remoteproc/mtk_common.h | 4 ++++
drivers/remoteproc/mtk_scp.c | 27 ++++++++++++++++++++++++++-
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h
index ea6fa1100a00..73e8adf00de3 100644
--- a/drivers/remoteproc/mtk_common.h
+++ b/drivers/remoteproc/mtk_common.h
@@ -54,6 +54,10 @@
#define MT8192_CORE0_WDT_IRQ 0x10030
#define MT8192_CORE0_WDT_CFG 0x10034
+#define MT8195_SYS_STATUS 0x4004
+#define MT8195_CORE0_WDT BIT(16)
+#define MT8195_CORE1_WDT BIT(17)
+
#define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4)
#define SCP_FW_VER_LEN 32
diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c
index 47b2a40e1b4a..3510c6d0bbc8 100644
--- a/drivers/remoteproc/mtk_scp.c
+++ b/drivers/remoteproc/mtk_scp.c
@@ -212,6 +212,31 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp)
}
}
+static void mt8195_scp_irq_handler(struct mtk_scp *scp)
+{
+ u32 scp_to_host;
+
+ scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
+
+ if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
+ scp_ipi_handler(scp);
+
+ /*
+ * SCP won't send another interrupt until we clear
+ * MT8192_SCP2APMCU_IPC.
+ */
+ writel(MT8192_SCP_IPC_INT_BIT,
+ scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
+ } else {
+ if (readl(scp->reg_base + MT8195_SYS_STATUS) & MT8195_CORE1_WDT) {
+ writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ);
+ } else {
+ writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
+ scp_wdt_handler(scp, scp_to_host);
+ }
+ }
+}
+
static irqreturn_t scp_irq_handler(int irq, void *priv)
{
struct mtk_scp *scp = priv;
@@ -961,7 +986,7 @@ static const struct mtk_scp_of_data mt8192_of_data = {
static const struct mtk_scp_of_data mt8195_of_data = {
.scp_clk_get = mt8195_scp_clk_get,
.scp_before_load = mt8195_scp_before_load,
- .scp_irq_handler = mt8192_scp_irq_handler,
+ .scp_irq_handler = mt8195_scp_irq_handler,
.scp_reset_assert = mt8192_scp_reset_assert,
.scp_reset_deassert = mt8192_scp_reset_deassert,
.scp_stop = mt8195_scp_stop,
--
2.18.0
next prev parent reply other threads:[~2022-06-01 11:22 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-01 11:21 [PATCH v1 00/15] Add support for MT8195 SCP 2nd core Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 01/15] dt-binding: remoteproc: mediatek: Support dual-core SCP Tinghan Shen
2022-06-01 11:50 ` Krzysztof Kozlowski
2022-06-02 5:21 ` Tinghan Shen
2022-06-02 6:55 ` Krzysztof Kozlowski
2022-06-02 8:58 ` Tinghan Shen
2022-06-02 10:37 ` Krzysztof Kozlowski
2022-06-02 11:29 ` Tinghan Shen
2022-06-02 12:02 ` Krzysztof Kozlowski
2022-06-01 11:21 ` [PATCH v1 02/15] remoteproc: Kconfig: Add mt8195 SCP dual core configuration Tinghan Shen
2022-06-01 11:21 ` Tinghan Shen [this message]
2022-06-01 11:21 ` [PATCH v1 04/15] remoteproc: mediatek: Add SCP core 1 register definitions Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 05/15] remoteproc: mediatek: Add SCP core 1 driver for dual-core scp Tinghan Shen
2022-06-06 9:15 ` AngeloGioacchino Del Regno
2022-06-06 9:52 ` Tinghan Shen
2022-06-06 10:08 ` AngeloGioacchino Del Regno
2022-06-06 10:41 ` Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 06/15] remoteproc: mediatek: Add SCP core 1 rproc operations Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 07/15] remoteproc: mediatek: Add SCP core 1 reserved memory support Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 08/15] remoteproc: mediatek: Add SCP core 1 interrupt support Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 09/15] remoteproc: mediatek: Register SCP core 1 initialization ipi Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 10/15] remoteproc: mediatek: Add chip dependent operations for SCP core 1 Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 11/15] remoteproc: mediatek: Add SCP core 1 SRAM offset Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 12/15] remoteproc: mediatek: Add SCP core 1 as a rproc subdevice Tinghan Shen
2022-06-01 11:21 ` [PATCH v1 13/15] remoteproc: mediatek: Wait SCP core 1 probe done Tinghan Shen
2022-06-01 11:22 ` [PATCH v1 14/15] remoteproc: mediatek: Support rpmsg for SCP core 1 Tinghan Shen
2022-06-01 11:22 ` [PATCH v1 15/15] mfd: cros_ec: Add SCP core 1 as a new CrOS EC MCU Tinghan Shen
2022-06-15 22:28 ` Lee Jones
2022-06-01 11:46 ` [PATCH v1 00/15] Add support for MT8195 SCP 2nd core Krzysztof Kozlowski
2022-06-02 3:52 ` Tinghan Shen
2022-06-02 6:56 ` Krzysztof Kozlowski
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