From: Abel Vesa <abel.vesa@nxp.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Joakim Zhang <qiangqing.zhang@nxp.com>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
NXP Linux Team <linux-imx@nxp.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
devicetree@vger.kernel.org, <netdev@vger.kernel.org>,
linux-phy@lists.infradead.org,
linux-arm-kernel@lists.infradead.org, linux-usb@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>
Subject: [PATCH v9 03/12] arm64: dts: freescale: Add ddr subsys dtsi for imx8dxl
Date: Tue, 7 Jun 2022 14:16:16 +0300 [thread overview]
Message-ID: <20220607111625.1845393-4-abel.vesa@nxp.com> (raw)
In-Reply-To: <20220607111625.1845393-1-abel.vesa@nxp.com>
From: Jacky Bai <ping.bai@nxp.com>
Add the ddr subsys dtsi for i.MX8DXL. Additional db pmu is added
compared to i.MX8QXP.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
.../boot/dts/freescale/imx8dxl-ss-ddr.dtsi | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
new file mode 100644
index 000000000000..8a91eb33b4ef
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2021 NXP
+ */
+
+&ddr_subsys {
+ db_ipg_clk: clock-db-ipg@0 {
+ compatible = "fixed-clock";
+ reg = <0 0>;
+ #clock-cells = <0>;
+ clock-frequency = <456000000>;
+ clock-output-names = "db_ipg_clk";
+ };
+
+ db_pmu0: db-pmu@5ca40000 {
+ compatible = "fsl,imx8dxl-db-pmu";
+ reg = <0x5ca40000 0x10000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&db_pmu0_lpcg IMX_LPCG_CLK_0>,
+ <&db_pmu0_lpcg IMX_LPCG_CLK_1>;
+ clock-names = "ipg", "cnt";
+ power-domains = <&pd IMX_SC_R_PERF>;
+ };
+
+ db_pmu0_lpcg: clock-controller@5cae0000 {
+ compatible = "fsl,imx8qxp-lpcg";
+ reg = <0x5cae0000 0x10000>;
+ #clock-cells = <1>;
+ clocks = <&db_ipg_clk>, <&db_ipg_clk>;
+ clock-indices = <IMX_LPCG_CLK_0>,
+ <IMX_LPCG_CLK_1>;
+ clock-output-names = "perf_lpcg_cnt_clk",
+ "perf_lpcg_ipg_clk";
+ power-domains = <&pd IMX_SC_R_PERF>;
+ };
+};
--
2.34.3
next prev parent reply other threads:[~2022-06-07 11:17 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-07 11:16 [PATCH v9 00/12] arm64: dts: Add i.MX8DXL initial support Abel Vesa
2022-06-07 11:16 ` [PATCH v9 01/12] arm64: dts: freescale: Add adma subsystem dtsi for imx8dxl Abel Vesa
2022-06-07 11:16 ` [PATCH v9 02/12] arm64: dts: freescale: Add the imx8dxl connectivity subsys dtsi Abel Vesa
2022-06-07 11:16 ` Abel Vesa [this message]
2022-06-07 11:16 ` [PATCH v9 04/12] arm64: dts: freescale: Add lsio subsys dtsi for imx8dxl Abel Vesa
2022-06-07 11:16 ` [PATCH v9 05/12] arm64: dts: freescale: Add the top level dtsi support " Abel Vesa
2022-06-07 11:16 ` [PATCH v9 06/12] dt-bindings: arm: Document i.MX8DXL EVK board binding Abel Vesa
2022-06-07 11:16 ` [PATCH v9 07/12] dt-bindings: net: fec: Add i.MX8DXL compatible string Abel Vesa
2022-06-07 11:16 ` [PATCH v9 08/12] dt-bindings: phy: mxs-usb-phy: " Abel Vesa
2022-06-08 16:22 ` Vinod Koul
2022-10-12 11:45 ` Peng Fan
2022-10-12 12:52 ` Krzysztof Kozlowski
2022-06-07 11:16 ` [PATCH v9 09/12] dt-bindings: usb: ci-hdrc-usb2: " Abel Vesa
2022-06-07 11:16 ` [PATCH v9 10/12] dt-bindings: usb: usbmisc-imx: " Abel Vesa
2022-06-07 11:16 ` [PATCH v9 11/12] dt-bindings: arm: freescale: scu-ocotp: " Abel Vesa
2022-06-28 14:34 ` Rob Herring
2022-06-07 11:16 ` [PATCH v9 12/12] dt-bindings: arm: freescale: scu-pd: " Abel Vesa
2022-06-28 14:35 ` Rob Herring
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