From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFAB8C43334 for ; Fri, 10 Jun 2022 02:55:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346079AbiFJCzU (ORCPT ); Thu, 9 Jun 2022 22:55:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51246 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345903AbiFJCzQ (ORCPT ); Thu, 9 Jun 2022 22:55:16 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F7DB4B1C3; Thu, 9 Jun 2022 19:55:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1654829715; x=1686365715; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BffFOdQMPEYvC7h1x1iCTPOeihZiP6YHL12WLtj2ijc=; b=B2g3VikObh/dEJplh0yJTsdKoJW/lmijRrqiHPQVksAPYj4zurAAMtRD RYMAch2NHRwSak8bljSnk4sat8d6suIMxHbkS5xEeVtZf+MILY0b69LbI bdbRa5qUvLtaKC8BCx4aGeEK4rIr5hT1Kttau9iek/nH9xRcB97qIHxjl MifSpOPdocoZ0ZFtEHtHl3LaUvgB1U7ggUAdm4IDzOf01jaa4Azq7eMes HYeaAEkHywRigoIRzT9IUzgHc3JZOb/qmjm+wpm4JvcFN6/Z7esIPSs+N M1cYaYNrfPC7Aagm3M0U4d6qLo+DFalFddyuj8NvQE96f+AzCa8BLTKrc A==; X-IronPort-AV: E=McAfee;i="6400,9594,10373"; a="339246127" X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="339246127" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2022 19:55:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="566670372" Received: from zxingrtx.sh.intel.com ([10.239.159.110]) by orsmga002.jf.intel.com with ESMTP; 09 Jun 2022 19:55:11 -0700 From: zhengjun.xing@linux.intel.com To: acme@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@intel.com, jolsa@kernel.org, namhyung@kernel.org Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, irogers@google.com, ak@linux.intel.com, kan.liang@linux.intel.com, zhengjun.xing@linux.intel.com Subject: [PATCH v3 2/5] perf evsel: Add arch_evsel__hw_name() Date: Fri, 10 Jun 2022 10:54:46 +0800 Message-Id: <20220610025449.2089232-3-zhengjun.xing@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610025449.2089232-1-zhengjun.xing@linux.intel.com> References: <20220610025449.2089232-1-zhengjun.xing@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Kan Liang The commit 55bcf6ef314a ("perf: Extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE") extends the two types to become PMU aware types for a hybrid system. However, current evsel__hw_name doesn't take the PMU type into account. It mistakenly returns the "unknown-hardware" for the hardware event with a specific PMU type. Add an Arch specific arch_evsel__hw_name() to specially handle the PMU aware hardware event. Currently, the extend PERF_TYPE_HARDWARE and PERF_TYPE_HW_CACHE is only supported by X86. Only implement the specific arch_evsel__hw_name() for X86 in the patch. Nothing is changed for the other Archs. Signed-off-by: Kan Liang Signed-off-by: Zhengjun Xing --- Change log: v3: * no change since v1. tools/perf/arch/x86/util/evsel.c | 20 ++++++++++++++++++++ tools/perf/util/evsel.c | 7 ++++++- tools/perf/util/evsel.h | 1 + 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/evsel.c index 3501399cef35..f6feb61d98a0 100644 --- a/tools/perf/arch/x86/util/evsel.c +++ b/tools/perf/arch/x86/util/evsel.c @@ -61,3 +61,23 @@ bool arch_evsel__must_be_in_group(const struct evsel *evsel) (strcasestr(evsel->name, "slots") || strcasestr(evsel->name, "topdown")); } + +int arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size) +{ + u64 event = evsel->core.attr.config & PERF_HW_EVENT_MASK; + u64 pmu = evsel->core.attr.config >> PERF_PMU_TYPE_SHIFT; + const char *event_name; + + if (event < PERF_COUNT_HW_MAX && evsel__hw_names[event]) + event_name = evsel__hw_names[event]; + else + event_name = "unknown-hardware"; + + /* The PMU type is not required for the non-hybrid platform. */ + if (!pmu) + return scnprintf(bf, size, "%s", event_name); + + return scnprintf(bf, size, "%s/%s/", + evsel->pmu_name ? evsel->pmu_name : "cpu", + event_name); +} diff --git a/tools/perf/util/evsel.c b/tools/perf/util/evsel.c index ce499c5da8d7..782be377208f 100644 --- a/tools/perf/util/evsel.c +++ b/tools/perf/util/evsel.c @@ -593,9 +593,14 @@ static int evsel__add_modifiers(struct evsel *evsel, char *bf, size_t size) return r; } +int __weak arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size) +{ + return scnprintf(bf, size, "%s", __evsel__hw_name(evsel->core.attr.config)); +} + static int evsel__hw_name(struct evsel *evsel, char *bf, size_t size) { - int r = scnprintf(bf, size, "%s", __evsel__hw_name(evsel->core.attr.config)); + int r = arch_evsel__hw_name(evsel, bf, size); return r + evsel__add_modifiers(evsel, bf + r, size - r); } diff --git a/tools/perf/util/evsel.h b/tools/perf/util/evsel.h index 73ea48e94079..8dd3f04a5bdb 100644 --- a/tools/perf/util/evsel.h +++ b/tools/perf/util/evsel.h @@ -271,6 +271,7 @@ extern const char *const evsel__hw_names[PERF_COUNT_HW_MAX]; extern const char *const evsel__sw_names[PERF_COUNT_SW_MAX]; extern char *evsel__bpf_counter_events; bool evsel__match_bpf_counter_events(const char *name); +int arch_evsel__hw_name(struct evsel *evsel, char *bf, size_t size); int __evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result, char *bf, size_t size); const char *evsel__name(struct evsel *evsel); -- 2.25.1