From: Chen Zhongjin <chenzhongjin@huawei.com>
To: <linux-kernel@vger.kernel.org>, <linux-arch@vger.kernel.org>,
<linuxppc-dev@lists.ozlabs.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kbuild@vger.kernel.org>, <live-patching@vger.kernel.org>
Cc: <jpoimboe@kernel.org>, <peterz@infradead.org>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<masahiroy@kernel.org>, <michal.lkml@markovi.net>,
<ndesaulniers@google.com>, <mark.rutland@arm.com>,
<pasha.tatashin@soleen.com>, <broonie@kernel.org>,
<chenzhongjin@huawei.com>, <rmk+kernel@armlinux.org.uk>,
<madvenka@linux.microsoft.com>, <christophe.leroy@csgroup.eu>,
<daniel.thompson@linaro.org>
Subject: [PATCH v6 06/33] objtool: arm64: Decode load/store instructions
Date: Thu, 23 Jun 2022 09:48:50 +0800 [thread overview]
Message-ID: <20220623014917.199563-7-chenzhongjin@huawei.com> (raw)
In-Reply-To: <20220623014917.199563-1-chenzhongjin@huawei.com>
Decode load/store operations and create corresponding stack_ops for
operations targeting SP or FP.
Operations storing/loading multiple registers are split into separate
stack_ops storing single registers.
Operations modifying the base register get an additional stack_op
for the register update. Since the atomic register(s) load/store + base
register update gets split into multiple operations, to make sure
objtool always sees a valid stack, consider store instruction to perform
stack allocations (i.e. modifying the base pointer before the storing)
and loads de-allocations (i.e. modifying the base pointer after the
load).
Signed-off-by: Julien Thierry <jthierry@redhat.com>
Signed-off-by: Chen Zhongjin <chenzhongjin@huawei.com>
---
tools/objtool/arch/arm64/decode.c | 112 ++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c
index 19840862f3aa..8ce9d91ff0db 100644
--- a/tools/objtool/arch/arm64/decode.c
+++ b/tools/objtool/arch/arm64/decode.c
@@ -132,6 +132,114 @@ static inline void make_add_op(enum aarch64_insn_register dest,
op->src.offset = val;
}
+static inline void make_store_op(enum aarch64_insn_register base,
+ enum aarch64_insn_register reg,
+ int offset, struct stack_op *op)
+{
+ op->dest.type = OP_DEST_REG_INDIRECT;
+ op->dest.reg = base;
+ op->dest.offset = offset;
+ op->src.type = OP_SRC_REG;
+ op->src.reg = reg;
+ op->src.offset = 0;
+}
+
+static inline void make_load_op(enum aarch64_insn_register base,
+ enum aarch64_insn_register reg,
+ int offset, struct stack_op *op)
+{
+ op->dest.type = OP_DEST_REG;
+ op->dest.reg = reg;
+ op->dest.offset = 0;
+ op->src.type = OP_SRC_REG_INDIRECT;
+ op->src.reg = base;
+ op->src.offset = offset;
+}
+
+static inline bool aarch64_insn_is_ldst_pre(u32 insn)
+{
+ return aarch64_insn_is_store_pre(insn) ||
+ aarch64_insn_is_load_pre(insn) ||
+ aarch64_insn_is_stp_pre(insn) ||
+ aarch64_insn_is_ldp_pre(insn);
+}
+
+static inline bool aarch64_insn_is_ldst_post(u32 insn)
+{
+ return aarch64_insn_is_store_post(insn) ||
+ aarch64_insn_is_load_post(insn) ||
+ aarch64_insn_is_stp_post(insn) ||
+ aarch64_insn_is_ldp_post(insn);
+}
+
+static int decode_load_store(u32 insn, unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ enum aarch64_insn_register base;
+ enum aarch64_insn_register rt;
+ struct stack_op *op;
+ int size;
+ int offset;
+
+ if (aarch64_insn_is_store_single(insn) ||
+ aarch64_insn_is_load_single(insn))
+ size = 1 << ((insn & GENMASK(31, 30)) >> 30);
+ else
+ size = 4 << ((insn >> 31) & 1);
+
+ if (aarch64_insn_is_store_pair(insn) ||
+ aarch64_insn_is_load_pair(insn))
+ *immediate = size * sign_extend(aarch64_insn_decode_immediate(AARCH64_INSN_IMM_7,
+ insn), 7);
+ else if (aarch64_insn_is_store_imm(insn) ||
+ aarch64_insn_is_load_imm(insn))
+ *immediate = size * aarch64_insn_decode_immediate(AARCH64_INSN_IMM_12, insn);
+ else /* load/store_pre/post */
+ *immediate = sign_extend(aarch64_insn_decode_immediate(AARCH64_INSN_IMM_9,
+ insn), 9);
+
+ base = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RN, insn);
+ if (!is_SPFP(base))
+ return 0;
+
+ if (aarch64_insn_is_ldst_post(insn))
+ offset = 0;
+ else
+ offset = *immediate;
+
+ /* First register */
+ rt = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RT, insn);
+ ADD_OP(op) {
+ if (aarch64_insn_is_store_single(insn) ||
+ aarch64_insn_is_store_pair(insn))
+ make_store_op(base, rt, offset, op);
+ else
+ make_load_op(base, rt, offset, op);
+ }
+
+ /* Second register (if present) */
+ if (aarch64_insn_is_store_pair(insn) ||
+ aarch64_insn_is_load_pair(insn)) {
+ rt = aarch64_insn_decode_register(AARCH64_INSN_REGTYPE_RT2,
+ insn);
+ ADD_OP(op) {
+ if (aarch64_insn_is_store_pair(insn))
+ make_store_op(base, rt, offset + size, op);
+ else
+ make_load_op(base, rt, offset + size, op);
+ }
+ }
+
+ if (aarch64_insn_is_ldst_pre(insn) ||
+ aarch64_insn_is_ldst_post(insn)) {
+ ADD_OP(op) {
+ make_add_op(base, base, *immediate, op);
+ }
+ }
+
+ return 0;
+}
+
static void decode_add_sub_imm(u32 instr, bool set_flags,
unsigned long *immediate,
struct stack_op *op)
@@ -241,6 +349,10 @@ int arch_decode_instruction(struct objtool_file *file, const struct section *sec
*immediate = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_16, insn);
}
break;
+ case AARCH64_INSN_CLS_LDST:
+ {
+ return decode_load_store(insn, immediate, ops_list);
+ }
default:
break;
}
--
2.17.1
next prev parent reply other threads:[~2022-06-23 1:53 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-23 1:48 [PATCH v5 00/33] objtool: add base support for arm64 Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 01/33] tools: arm64: Make aarch64 instruction decoder available to tools Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 02/33] objtool: arm64: Add base definition for arm64 backend Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 03/33] objtool: arm64: Decode add/sub instructions Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 04/33] objtool: arm64: Decode jump and call related instructions Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 05/33] objtool: arm64: Decode other system instructions Chen Zhongjin
2022-06-23 1:48 ` Chen Zhongjin [this message]
2022-06-23 1:48 ` [PATCH v6 07/33] objtool: arm64: Decode LDR instructions Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 08/33] objtool: arm64: Accept non-instruction data in code sections Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 09/33] objtool: check: Support data in text section Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 10/33] objtool: arm64: Handle supported relocations in alternatives Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 11/33] objtool: arm64: Ignore replacement section for alternative callback Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 12/33] objtool: arm64: Enable stack validation for arm64 Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 13/33] objtool: arm64: Enable ORC " Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 14/33] objtool: arm64: Add annotate_reachable() for objtools Chen Zhongjin
2022-06-23 1:48 ` [PATCH v6 15/33] arm64: bug: Add reachable annotation to warning macros Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 16/33] arm64: kgdb: Add reachable annotation after kgdb brk Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 17/33] objtool: arm64: Add unwind_hint support Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 18/33] arm64: Change symbol type annotations Chen Zhongjin
2022-06-29 17:47 ` Mark Brown
2022-06-30 2:41 ` Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 19/33] arm64: Annotate unwind_hint for symbols with empty stack Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 20/33] arm64: entry: Annotate unwind_hint for entry Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 21/33] arm64: kvm: Annotate unwind_hint for hyp entry Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 22/33] arm64: efi-header: Mark efi header as data Chen Zhongjin
2022-06-29 18:03 ` Mark Brown
2022-06-23 1:49 ` [PATCH v6 23/33] arm64: head: Mark constants " Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 24/33] arm64: proc: Mark constant " Chen Zhongjin
2022-06-29 18:06 ` Mark Brown
2022-06-23 1:49 ` [PATCH v6 25/33] arm64: crypto: " Chen Zhongjin
2022-06-29 18:20 ` Mark Brown
2022-06-23 1:49 ` [PATCH v6 26/33] arm64: crypto: Remove unnecessary stackframe Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 27/33] arm64: Set intra-function call annotations Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 28/33] arm64: sleep: Properly set frame pointer before call Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 29/33] arm64: compat: Move VDSO code to .rodata section Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 30/33] arm64: entry: Align stack size for alternative Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 31/33] arm64: kernel: Skip validation of proton-pack.c Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 32/33] arm64: irq-gic: Replace unreachable() with -EINVAL Chen Zhongjin
2022-06-23 8:13 ` Marc Zyngier
2022-06-24 1:24 ` Chen Zhongjin
2022-06-23 1:49 ` [PATCH v6 33/33] objtool: revert c_file fallthrough detection for arm64 Chen Zhongjin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220623014917.199563-7-chenzhongjin@huawei.com \
--to=chenzhongjin@huawei.com \
--cc=broonie@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=christophe.leroy@csgroup.eu \
--cc=daniel.thompson@linaro.org \
--cc=jpoimboe@kernel.org \
--cc=linux-arch@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kbuild@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=live-patching@vger.kernel.org \
--cc=madvenka@linux.microsoft.com \
--cc=mark.rutland@arm.com \
--cc=masahiroy@kernel.org \
--cc=michal.lkml@markovi.net \
--cc=ndesaulniers@google.com \
--cc=pasha.tatashin@soleen.com \
--cc=peterz@infradead.org \
--cc=rmk+kernel@armlinux.org.uk \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).