* [PATCH] x86, cpu: use MSR_IA32_MISC_ENABLE constants
@ 2022-07-19 17:47 Paolo Bonzini
2022-07-19 19:05 ` [tip: x86/cpu] x86/cpu: Use " tip-bot2 for Paolo Bonzini
0 siblings, 1 reply; 2+ messages in thread
From: Paolo Bonzini @ 2022-07-19 17:47 UTC (permalink / raw)
To: linux-kernel, kvm; +Cc: tglx, mingo, bp, dave.hansen, x86, hpa
Instead of the magic numbers 1<<11 and 1<<12 use the constants
from msr-index.h. This makes it obvious where those bits
of MSR_IA32_MISC_ENABLE are consumed (and in fact that Linux
consumes them at all) to simple minds that grep for
MSR_IA32_MISC_ENABLE_.*_UNAVAIL.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
arch/x86/kernel/cpu/intel.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index fd5dead8371c..663f6e6dd288 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -682,9 +682,9 @@ static void init_intel(struct cpuinfo_x86 *c)
unsigned int l1, l2;
rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
- if (!(l1 & (1<<11)))
+ if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL))
set_cpu_cap(c, X86_FEATURE_BTS);
- if (!(l1 & (1<<12)))
+ if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL))
set_cpu_cap(c, X86_FEATURE_PEBS);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* [tip: x86/cpu] x86/cpu: Use MSR_IA32_MISC_ENABLE constants
2022-07-19 17:47 [PATCH] x86, cpu: use MSR_IA32_MISC_ENABLE constants Paolo Bonzini
@ 2022-07-19 19:05 ` tip-bot2 for Paolo Bonzini
0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Paolo Bonzini @ 2022-07-19 19:05 UTC (permalink / raw)
To: linux-tip-commits; +Cc: Paolo Bonzini, Borislav Petkov, x86, linux-kernel
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 3f2adf00f52b5f2e9e9f23bb5c77608fc9ee297c
Gitweb: https://git.kernel.org/tip/3f2adf00f52b5f2e9e9f23bb5c77608fc9ee297c
Author: Paolo Bonzini <pbonzini@redhat.com>
AuthorDate: Tue, 19 Jul 2022 13:47:14 -04:00
Committer: Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 19 Jul 2022 20:53:10 +02:00
x86/cpu: Use MSR_IA32_MISC_ENABLE constants
Instead of the magic numbers 1<<11 and 1<<12 use the constants
from msr-index.h. This makes it obvious where those bits
of MSR_IA32_MISC_ENABLE are consumed (and in fact that Linux
consumes them at all) to simple minds that grep for
MSR_IA32_MISC_ENABLE_.*_UNAVAIL.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20220719174714.2410374-1-pbonzini@redhat.com
---
arch/x86/kernel/cpu/intel.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 8321c43..a00dd3e 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -647,9 +647,9 @@ static void init_intel(struct cpuinfo_x86 *c)
unsigned int l1, l2;
rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
- if (!(l1 & (1<<11)))
+ if (!(l1 & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL))
set_cpu_cap(c, X86_FEATURE_BTS);
- if (!(l1 & (1<<12)))
+ if (!(l1 & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL))
set_cpu_cap(c, X86_FEATURE_PEBS);
}
^ permalink raw reply related [flat|nested] 2+ messages in thread
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