[PATCH v2 0/2] Add PHY interrupt support for ETH{0,1} on RZ/G2L and RZ/V2L SMARC EVK

[PATCH v2 0/2] Add PHY interrupt support for ETH{0,1} on RZ/G2L and RZ/V2L SMARC EVK

[Lad Prabhakar]

Hi All,

This patch series is a subset of [0] as patches 1-4 have been already
picked up by Geert for v5.21. Patch 1 introduces macros for IRQ0-7 and
second patch adds PHY interrupt support for ETH{0,1}.

v1->v2:
* Fixed review comments pointed by Geert

v1: [0]

[0] https://patchwork.kernel.org/project/linux-renesas-soc/cover/
20220718195651.7711-1-prabhakar.mahadev-lad.rj@bp.renesas.com/

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7
  arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for
    ETH{0/1}

 arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 10 ++++++++--
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h      | 10 ++++++++++
 2 files changed, 18 insertions(+), 2 deletions(-)

-- 
2.25.1

[PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7

[Lad Prabhakar]

Add macros for IRQ0-7 which map to SPI1-8 so that it can be used in dts/i.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2
* New patch
---
 include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
index c78ed5e5efb7..6aae2ac206d6 100644
--- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
+++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
@@ -20,4 +20,14 @@
 /* Convert a port and pin label to its global pin index */
 #define RZG2L_GPIO(port, pin)	((port) * RZG2L_PINS_PER_PORT + (pin))
 
+/* IRQ0-7 map to SPI1-8 */
+#define RZG2L_IRQ0	1
+#define RZG2L_IRQ1	2
+#define RZG2L_IRQ2	3
+#define RZG2L_IRQ3	4
+#define RZG2L_IRQ4	5
+#define RZG2L_IRQ5	6
+#define RZG2L_IRQ6	7
+#define RZG2L_IRQ7	8
+
 #endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */
-- 
2.25.1

[PATCH v2 2/2] arm64: dts: renesas: rzg2l-smarc-som: Add PHY interrupt support for ETH{0/1}

[Lad Prabhakar]

The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ3 for ETH0
and ETH1 respectively.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2
* Used macros of IRQ numbers
---
 arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
index 9410796c8ad6..3ffda0d3fa01 100644
--- a/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2l-smarc-som.dtsi
@@ -94,6 +94,8 @@ phy0: ethernet-phy@7 {
 		compatible = "ethernet-phy-id0022.1640",
 			     "ethernet-phy-ieee802.3-c22";
 		reg = <7>;
+		interrupt-parent = <&irqc>;
+		interrupts = <RZG2L_IRQ2 IRQ_TYPE_LEVEL_LOW>;
 		rxc-skew-psec = <2400>;
 		txc-skew-psec = <2400>;
 		rxdv-skew-psec = <0>;
@@ -120,6 +122,8 @@ phy1: ethernet-phy@7 {
 		compatible = "ethernet-phy-id0022.1640",
 			     "ethernet-phy-ieee802.3-c22";
 		reg = <7>;
+		interrupt-parent = <&irqc>;
+		interrupts = <RZG2L_IRQ3 IRQ_TYPE_LEVEL_LOW>;
 		rxc-skew-psec = <2400>;
 		txc-skew-psec = <2400>;
 		rxdv-skew-psec = <0>;
@@ -171,7 +175,8 @@ eth0_pins: eth0 {
 			 <RZG2L_PORT_PINMUX(25, 0, 1)>, /* ET0_RXD0 */
 			 <RZG2L_PORT_PINMUX(25, 1, 1)>, /* ET0_RXD1 */
 			 <RZG2L_PORT_PINMUX(26, 0, 1)>, /* ET0_RXD2 */
-			 <RZG2L_PORT_PINMUX(26, 1, 1)>; /* ET0_RXD3 */
+			 <RZG2L_PORT_PINMUX(26, 1, 1)>, /* ET0_RXD3 */
+			 <RZG2L_PORT_PINMUX(1, 0, 1)>;  /* IRQ2 */
 	};
 
 	eth1_pins: eth1 {
@@ -189,7 +194,8 @@ eth1_pins: eth1 {
 			 <RZG2L_PORT_PINMUX(34, 1, 1)>, /* ET1_RXD0 */
 			 <RZG2L_PORT_PINMUX(35, 0, 1)>, /* ET1_RXD1 */
 			 <RZG2L_PORT_PINMUX(35, 1, 1)>, /* ET1_RXD2 */
-			 <RZG2L_PORT_PINMUX(36, 0, 1)>; /* ET1_RXD3 */
+			 <RZG2L_PORT_PINMUX(36, 0, 1)>, /* ET1_RXD3 */
+			 <RZG2L_PORT_PINMUX(1, 1, 1)>;  /* IRQ3 */
 	};
 
 	gpio-sd0-pwr-en-hog {
-- 
2.25.1

RE: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7

[Biju Das]

Hi Prabhakar,

Thanks for the patch.

> Subject: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros
> for IRQ0-7
> 
> Add macros for IRQ0-7 which map to SPI1-8 so that it can be used in
> dts/i.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> v1->v2
> * New patch
> ---
>  include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-
> bindings/pinctrl/rzg2l-pinctrl.h
> index c78ed5e5efb7..6aae2ac206d6 100644
> --- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> +++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> @@ -20,4 +20,14 @@
>  /* Convert a port and pin label to its global pin index */
>  #define RZG2L_GPIO(port, pin)	((port) * RZG2L_PINS_PER_PORT +
> (pin))
> 
> +/* IRQ0-7 map to SPI1-8 */
> +#define RZG2L_IRQ0	1
> +#define RZG2L_IRQ1	2
> +#define RZG2L_IRQ2	3
> +#define RZG2L_IRQ3	4
> +#define RZG2L_IRQ4	5
> +#define RZG2L_IRQ5	6
> +#define RZG2L_IRQ6	7
> +#define RZG2L_IRQ7	8
> +

Not sure, may be these macros to be moved to [1]?? as it is nothing to do
with rzg2l-pinctrl.

[1]
include/dt-bindings/interrupt-controller/irqc-rzg2l.h

and binding update to use these macros.

Cheers,
Biju

>  #endif /* __DT_BINDINGS_RZG2L_PINCTRL_H */
> --
> 2.25.1

Re: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7

[Geert Uytterhoeven]

CC maz

On Fri, Jul 22, 2022 at 6:34 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > Subject: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros
> > for IRQ0-7
> >
> > Add macros for IRQ0-7 which map to SPI1-8 so that it can be used in
> > dts/i.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v1->v2
> > * New patch
> > ---
> >  include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-
> > bindings/pinctrl/rzg2l-pinctrl.h
> > index c78ed5e5efb7..6aae2ac206d6 100644
> > --- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > +++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > @@ -20,4 +20,14 @@
> >  /* Convert a port and pin label to its global pin index */
> >  #define RZG2L_GPIO(port, pin)        ((port) * RZG2L_PINS_PER_PORT +
> > (pin))
> >
> > +/* IRQ0-7 map to SPI1-8 */
> > +#define RZG2L_IRQ0   1
> > +#define RZG2L_IRQ1   2
> > +#define RZG2L_IRQ2   3
> > +#define RZG2L_IRQ3   4
> > +#define RZG2L_IRQ4   5
> > +#define RZG2L_IRQ5   6
> > +#define RZG2L_IRQ6   7
> > +#define RZG2L_IRQ7   8

No definition for NMI?

> > +
>
> Not sure, may be these macros to be moved to [1]?? as it is nothing to do
> with rzg2l-pinctrl.
>
> [1]
> include/dt-bindings/interrupt-controller/irqc-rzg2l.h
>
> and binding update to use these macros.

Indeed.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7

[Lad, Prabhakar]

Hi Biju,

Thanks for the review.

On Fri, Jul 22, 2022 at 5:34 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
>
> Hi Prabhakar,
>
> Thanks for the patch.
>
> > Subject: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros
> > for IRQ0-7
> >
> > Add macros for IRQ0-7 which map to SPI1-8 so that it can be used in
> > dts/i.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > v1->v2
> > * New patch
> > ---
> >  include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 10 ++++++++++
> >  1 file changed, 10 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-
> > bindings/pinctrl/rzg2l-pinctrl.h
> > index c78ed5e5efb7..6aae2ac206d6 100644
> > --- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > +++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > @@ -20,4 +20,14 @@
> >  /* Convert a port and pin label to its global pin index */
> >  #define RZG2L_GPIO(port, pin)        ((port) * RZG2L_PINS_PER_PORT +
> > (pin))
> >
> > +/* IRQ0-7 map to SPI1-8 */
> > +#define RZG2L_IRQ0   1
> > +#define RZG2L_IRQ1   2
> > +#define RZG2L_IRQ2   3
> > +#define RZG2L_IRQ3   4
> > +#define RZG2L_IRQ4   5
> > +#define RZG2L_IRQ5   6
> > +#define RZG2L_IRQ6   7
> > +#define RZG2L_IRQ7   8
> > +
>
> Not sure, may be these macros to be moved to [1]?? as it is nothing to do
> with rzg2l-pinctrl.
>
> [1]
> include/dt-bindings/interrupt-controller/irqc-rzg2l.h
>
Agreed, I will move this to irqc-rzg2l.h.

> and binding update to use these macros.
>
Ok.

Cheers,
Prabhakar

Re: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros for IRQ0-7

[Lad, Prabhakar]

Hi Geert,

Thank you for the review.

On Fri, Jul 22, 2022 at 10:01 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
>
> CC maz
>
> On Fri, Jul 22, 2022 at 6:34 AM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > Subject: [PATCH v2 1/2] dt-bindings: pinctrl: rzg2l-pinctrl: Add macros
> > > for IRQ0-7
> > >
> > > Add macros for IRQ0-7 which map to SPI1-8 so that it can be used in
> > > dts/i.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > v1->v2
> > > * New patch
> > > ---
> > >  include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 10 ++++++++++
> > >  1 file changed, 10 insertions(+)
> > >
> > > diff --git a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h b/include/dt-
> > > bindings/pinctrl/rzg2l-pinctrl.h
> > > index c78ed5e5efb7..6aae2ac206d6 100644
> > > --- a/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > > +++ b/include/dt-bindings/pinctrl/rzg2l-pinctrl.h
> > > @@ -20,4 +20,14 @@
> > >  /* Convert a port and pin label to its global pin index */
> > >  #define RZG2L_GPIO(port, pin)        ((port) * RZG2L_PINS_PER_PORT +
> > > (pin))
> > >
> > > +/* IRQ0-7 map to SPI1-8 */
> > > +#define RZG2L_IRQ0   1
> > > +#define RZG2L_IRQ1   2
> > > +#define RZG2L_IRQ2   3
> > > +#define RZG2L_IRQ3   4
> > > +#define RZG2L_IRQ4   5
> > > +#define RZG2L_IRQ5   6
> > > +#define RZG2L_IRQ6   7
> > > +#define RZG2L_IRQ7   8
>
> No definition for NMI?
>
Ok, I will add a macro for NMI.

Cheers,
Prabhakar