From: Tinghan Shen <tinghan.shen@mediatek.com>
To: Yong Wu <yong.wu@mediatek.com>, Joerg Roedel <joro@8bytes.org>,
"Will Deacon" <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Lee Jones <lee@kernel.org>,
"Matthias Brugger" <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Tinghan Shen <tinghan.shen@mediatek.com>,
MandyJH Liu <mandyjh.liu@mediatek.com>
Cc: <iommu@lists.linux.dev>, <linux-mediatek@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
Henry Chen <henryc.chen@mediatek.com>
Subject: [PATCH v5 13/20] arm64: dts: mt8195: Add spmi node
Date: Thu, 4 Aug 2022 10:15:46 +0800 [thread overview]
Message-ID: <20220804021553.14867-14-tinghan.shen@mediatek.com> (raw)
In-Reply-To: <20220804021553.14867-1-tinghan.shen@mediatek.com>
Add spmi node to mt8195.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 7e77aecb1296e..da2d976ff8441 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -697,6 +697,21 @@
assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
};
+ spmi: spmi@10027000 {
+ compatible = "mediatek,mt8195-spmi";
+ reg = <0 0x10027000 0 0x000e00>,
+ <0 0x10029000 0 0x000100>;
+ reg-names = "pmif", "spmimst";
+ clocks = <&infracfg_ao CLK_INFRA_AO_PMIC_AP>,
+ <&infracfg_ao CLK_INFRA_AO_PMIC_TMR>,
+ <&topckgen CLK_TOP_SPMI_M_MST>;
+ clock-names = "pmif_sys_ck",
+ "pmif_tmr_ck",
+ "spmimst_clk_mux";
+ assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC>;
+ assigned-clock-parents = <&topckgen CLK_TOP_ULPOSC1_D10>;
+ };
+
scp_adsp: clock-controller@10720000 {
compatible = "mediatek,mt8195-scp_adsp";
reg = <0 0x10720000 0 0x1000>;
--
2.18.0
next prev parent reply other threads:[~2022-08-04 2:16 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-04 2:15 [PATCH v5 00/20] Add driver nodes for MT8195 SoC Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 01/20] dt-bindings: iommu: mediatek: Increase max interrupt number Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 02/20] dt-bindings: memory: mediatek: Update condition for mt8195 smi node Tinghan Shen
2022-08-04 15:12 ` Krzysztof Kozlowski
2022-08-09 11:01 ` Tinghan Shen
2022-08-09 11:34 ` Krzysztof Kozlowski
2022-08-09 13:53 ` Nícolas F. R. A. Prado
2022-08-10 1:51 ` Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 03/20] dt-bindings: power: mediatek: Refine multiple level power domain nodes Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 04/20] dt-bindings: power: mediatek: Support naming power controller node with unit address Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 05/20] dt-bindings: power: mediatek: Update maintainer list Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 06/20] dt-bindings: power: mediatek: Add bindings for MediaTek SCPSYS Tinghan Shen
2022-08-10 11:32 ` Lee Jones
2022-08-10 12:52 ` Sebastian Reichel
2022-08-04 2:15 ` [PATCH v5 07/20] arm64: dts: mediatek: Update mt81xx scpsys node to align with dt-bindings Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 08/20] arm64: dts: mt8195: Disable watchdog external reset signal Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 09/20] arm64: dts: mt8195: Disable I2C0 node Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 10/20] arm64: dts: mt8195: Add cpufreq node Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 11/20] arm64: dts: mt8195: Add vdosys and vppsys clock nodes Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 12/20] arm64: dts: mt8195: Add power domains controller Tinghan Shen
2022-08-04 2:15 ` Tinghan Shen [this message]
2022-08-04 2:15 ` [PATCH v5 14/20] arm64: dts: mt8195: Add scp node Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 15/20] arm64: dts: mt8195: Add audio related nodes Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 16/20] arm64: dts: mt8195: Add adsp node and adsp mailbox nodes Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 17/20] arm64: dts: mt8195: Specify audio reset controller Tinghan Shen
2022-08-04 2:15 ` [PATCH v5 18/20] arm64: dts: mt8195: Add iommu and smi nodes Tinghan Shen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20220804021553.14867-14-tinghan.shen@mediatek.com \
--to=tinghan.shen@mediatek.com \
--cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=devicetree@vger.kernel.org \
--cc=henryc.chen@mediatek.com \
--cc=iommu@lists.linux.dev \
--cc=joro@8bytes.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=lee@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=mandyjh.liu@mediatek.com \
--cc=matthias.bgg@gmail.com \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=will@kernel.org \
--cc=yong.wu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).