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[81.185.163.235]) by smtp.gmail.com with ESMTPSA id o15-20020adfcf0f000000b0021d6a520ce9sm1156817wrj.47.2022.08.04.06.09.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Aug 2022 06:09:59 -0700 (PDT) From: bchihi@baylibre.com To: rafael@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amitk@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, fan.chen@mediatek.com, louis.yu@mediatek.com, rex-bc.chen@mediatek.com, abailon@baylibre.com Subject: [PATCH v8.1, 2/7] dt-bindings: thermal: Add binding document for LVTS thermal controllers Date: Thu, 4 Aug 2022 15:09:07 +0200 Message-Id: <20220804130912.676043-3-bchihi@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220804130912.676043-1-bchihi@baylibre.com> References: <20220804130912.676043-1-bchihi@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexandre Bailon This patch adds dt-binding documents for mt8192 and mt8195 thermal controllers. Signed-off-by: Alexandre Bailon Signed-off-by: Balsam CHIHI --- .../thermal/mediatek,lvts-thermal.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml new file mode 100644 index 000000000000..53c44a73f3a4 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,lvts-thermal.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC LVTS thermal controller + +maintainers: + - Yu-Chia Chang + - Ben Tseng + +properties: + compatible: + enum: + - mediatek,mt8192-lvts-ap + - mediatek,mt8192-lvts-mcu + - mediatek,mt8195-lvts-ap + - mediatek,mt8195-lvts-mcu + + "#thermal-sensor-cells": + const: 1 + + reg: + maxItems: 2 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + items: + - description: SW reset HW AP/MCU domain to clean temporary data on HW initialization/resume. + + nvmem-cells: + items: + - description: LVTS calibration data 1 for thermal sensors + - description: LVTS calibration data 2 for thermal sensors + + nvmem-cell-names: + items: + - const: lvts_calib_data1 + - const: lvts_calib_data2 + +required: + - compatible + - '#thermal-sensor-cells' + - reg + - interrupts + - clocks + - resets + - nvmem-cells + - nvmem-cell-names + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + lvtsmcu: thermal-sensor@11278000 { + compatible = "mediatek,mt8195-lvts-mcu"; + #thermal-sensor-cells = <1>; + reg = <0 0x11278000 0 0x400>; + interrupts = ; + clocks = <&infracfg_ao CLK_INFRA_AO_THERM>; + resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>; + nvmem-cell-names = "lvts_calib_data1", "lvts_calib_data2"; + }; + +... -- 2.34.1