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[94.253.165.74]) by smtp.googlemail.com with ESMTPSA id dk5-20020a0564021d8500b00442d5054a51sm1851584edb.87.2022.08.18.15.06.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Aug 2022 15:06:37 -0700 (PDT) From: Robert Marko To: agross@kernel.org, bjorn.andersson@linaro.org, konrad.dybcio@somainline.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sivaprak@codeaurora.org, dmitry.baryshkov@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH v3 7/9] clk: qcom: apss-ipq-pll: add support for IPQ8074 Date: Fri, 19 Aug 2022 00:06:26 +0200 Message-Id: <20220818220628.339366-7-robimarko@gmail.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20220818220628.339366-1-robimarko@gmail.com> References: <20220818220628.339366-1-robimarko@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for IPQ8074 since it uses the same PLL setup, however it uses slightly different Alpha PLL config. Alpha PLL config was obtained by dumping PLL registers from a running device. Signed-off-by: Robert Marko --- Changes in v2: * Drop hardcoded compatible check for IPQ6018 to do the PLL config and utilize match data provided by previous commit * Add IPQ8074 Alpha PLL config using match data * Update commit description to reflect changes --- drivers/clk/qcom/apss-ipq-pll.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c index a4016f3854c2..a5aea27eb867 100644 --- a/drivers/clk/qcom/apss-ipq-pll.c +++ b/drivers/clk/qcom/apss-ipq-pll.c @@ -49,6 +49,18 @@ static const struct alpha_pll_config ipq6018_pll_config = { .test_ctl_hi_val = 0x4000, }; +static const struct alpha_pll_config ipq8074_pll_config = { + .l = 0x48, + .config_ctl_val = 0x200d4828, + .config_ctl_hi_val = 0x6, + .early_output_mask = BIT(3), + .aux2_output_mask = BIT(2), + .aux_output_mask = BIT(1), + .main_output_mask = BIT(0), + .test_ctl_val = 0x1c000000, + .test_ctl_hi_val = 0x4000, +}; + static const struct regmap_config ipq_pll_regmap_config = { .reg_bits = 32, .reg_stride = 4, @@ -89,6 +101,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev) static const struct of_device_id apss_ipq_pll_match_table[] = { { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config }, + { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config }, { } }; MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table); -- 2.37.2