From: Conor Dooley <conor.dooley@microchip.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>
Subject: [PATCH 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids
Date: Fri, 19 Aug 2022 13:22:57 +0100 [thread overview]
Message-ID: <20220819122259.183600-4-conor.dooley@microchip.com> (raw)
In-Reply-To: <20220819122259.183600-1-conor.dooley@microchip.com>
Each Clock Conditioning Circuitry block contains 2 PLLs and 2 DLLs.
The PLLs have 4 outputs each and the DLLs 2. Add 16 new IDs covering
these clocks. For more information on the CCC hardware, see the
"PolarFire SoC FPGA Clocking Resources" document at the link below.
Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
.../dt-bindings/clock/microchip,mpfs-clock.h | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/include/dt-bindings/clock/microchip,mpfs-clock.h b/include/dt-bindings/clock/microchip,mpfs-clock.h
index 4048669bf756..79775a5134ca 100644
--- a/include/dt-bindings/clock/microchip,mpfs-clock.h
+++ b/include/dt-bindings/clock/microchip,mpfs-clock.h
@@ -45,4 +45,27 @@
#define CLK_RTCREF 33
#define CLK_MSSPLL 34
+/* Clock Conditioning Circuitry Clock IDs */
+
+#define CLK_CCC_PLL0 0
+#define CLK_CCC_PLL1 1
+#define CLK_CCC_DLL0 2
+#define CLK_CCC_DLL1 3
+
+#define CLK_CCC_PLL0_OUT0 4
+#define CLK_CCC_PLL0_OUT1 5
+#define CLK_CCC_PLL0_OUT2 6
+#define CLK_CCC_PLL0_OUT3 7
+
+#define CLK_CCC_PLL1_OUT0 8
+#define CLK_CCC_PLL1_OUT1 9
+#define CLK_CCC_PLL1_OUT2 10
+#define CLK_CCC_PLL1_OUT3 11
+
+#define CLK_CCC_DLL0_OUT0 12
+#define CLK_CCC_DLL0_OUT1 13
+
+#define CLK_CCC_DLL1_OUT0 14
+#define CLK_CCC_DLL1_OUT1 15
+
#endif /* _DT_BINDINGS_CLK_MICROCHIP_MPFS_H_ */
--
2.36.1
next prev parent reply other threads:[~2022-08-19 12:28 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-19 12:22 [PATCH 0/6] Add PolarFire SoC Fabric Clock Conditioning Circuitry Support Conor Dooley
2022-08-19 12:22 ` [PATCH 1/6] dt-bindings: clk: rename mpfs-clkcfg binding Conor Dooley
2022-08-19 12:44 ` Krzysztof Kozlowski
2022-08-19 12:22 ` [PATCH 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Conor Dooley
2022-08-19 12:45 ` Krzysztof Kozlowski
2022-08-19 13:20 ` Conor.Dooley
2022-08-19 12:22 ` Conor Dooley [this message]
2022-08-19 12:45 ` [PATCH 3/6] dt-bindings: clk: add PolarFire SoC fabric clock ids Krzysztof Kozlowski
2022-08-19 12:22 ` [PATCH 4/6] clk: microchip: add PolarFire SoC fabric clock support Conor Dooley
2022-08-19 12:22 ` [PATCH 5/6] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-08-19 12:46 ` Krzysztof Kozlowski
2022-08-19 12:23 ` [PATCH 6/6] riscv: dts: microchip: add the mpfs' fabric clock control Conor Dooley
2022-08-19 12:47 ` Krzysztof Kozlowski
2022-08-19 13:15 ` Conor.Dooley
2022-08-19 13:28 ` Krzysztof Kozlowski
2022-08-19 13:48 ` Conor.Dooley
2022-08-19 14:06 ` Krzysztof Kozlowski
2022-08-19 14:14 ` Conor.Dooley
2022-08-19 14:22 ` Krzysztof Kozlowski
2022-08-19 14:32 ` Conor.Dooley
2022-08-19 14:35 ` Krzysztof Kozlowski
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