From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C1A99C32773 for ; Fri, 19 Aug 2022 19:01:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351034AbiHSTBc (ORCPT ); Fri, 19 Aug 2022 15:01:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350986AbiHSTBU (ORCPT ); Fri, 19 Aug 2022 15:01:20 -0400 Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C4E56107ACC; Fri, 19 Aug 2022 12:01:19 -0700 (PDT) Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 27JJ1APq114468; Fri, 19 Aug 2022 14:01:10 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1660935670; bh=D0lX4BN3cRvi+YtAEmV/Pmpqid+CUcQziDopJGlBOKk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Cz0/X3pasVUtUBN/ujkQUtbONQpPTgbYRfQG9ARuFITP4JSCftYKJU4pJG1rmJUJz +qE3Ju58Vq73K9ikl8zTghuKssnVPiD0N8esVFEYA98nOEU89lDgn25D8VxHSAeyPn /9fz/P7KY/HW3JfNwhm2dpaM3V0J3iA70M9oJ1PU= Received: from DFLE100.ent.ti.com (dfle100.ent.ti.com [10.64.6.21]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 27JJ1A0M114938 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 19 Aug 2022 14:01:10 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Fri, 19 Aug 2022 14:01:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Fri, 19 Aug 2022 14:01:10 -0500 Received: from LT5CD112GSQZ.ent.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 27JJ0tbJ056422; Fri, 19 Aug 2022 14:01:05 -0500 From: Apurva Nandan To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Linus Walleij , , , , CC: Apurva Nandan , Hari Nagalla Subject: [PATCH 2/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions for J784s4 Date: Sat, 20 Aug 2022 00:30:52 +0530 Message-ID: <20220819190054.31348-3-a-nandan@ti.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220819190054.31348-1-a-nandan@ti.com> References: <20220819190054.31348-1-a-nandan@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add pinctrl macros for J784s4 SoC. These macro definitions are similar to that of J721s2, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Hari Nagalla Signed-off-by: Apurva Nandan --- include/dt-bindings/pinctrl/k3.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h index a5204ab91d3e..f258074fd009 100644 --- a/include/dt-bindings/pinctrl/k3.h +++ b/include/dt-bindings/pinctrl/k3.h @@ -41,6 +41,9 @@ #define J721S2_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define J721S2_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J784S4_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) +#define J784S4_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) + #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) -- 2.17.1