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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?vq6juoeDQaAdsNnBQLwV+e+ilbuZORlXbXunEOvvfxCL8Gou8se3zTksYmPp?= =?us-ascii?Q?77ITMZ1ri7AemZ/waNgZDRLNMdaylPytzjB5l5Q2TM4msU630/1xzVOgig9o?= =?us-ascii?Q?EwGKhgiolyOcwclag6QA31SHQ5bQZe/pykM7feb3Gi8gMzhPUMF284ECyqEp?= =?us-ascii?Q?u9RSgvDm4pKss72BwnIcBuVQ27wo7VWBk6nTSL5jn866uL/ZE3TwWz+gMEAx?= =?us-ascii?Q?XxFl6oce///cOngUFW5TwVm6on1ta3J7rzlWpnarv1AZdss2c4SQOOsnV/iF?= =?us-ascii?Q?KftJqaYAtq9oBv8UUWhktwtw7LkAGvSnB33+Z+Q2Aber3N0B7JVsPdxO3VGl?= =?us-ascii?Q?/IBBxTz55iAdCoXnDI7b4+zK2NJkGt/kYbMhze8fxwgxplehAfXV6dm/GZ7S?= =?us-ascii?Q?jvyTy6jc2x/2k4XWEqaHZxJQMpeD0KVDCJDhOSpc6JVi0x6/r7hr71B2slKt?= =?us-ascii?Q?JEwkNZpm8cr5rRbRIMoNkWlu03mzfFRkKxWVNd4tOswXz55UVLwSdzCTH6QO?= =?us-ascii?Q?XoIyV77Od0beyYuNiOwp/M/w9J6uQyBSlu1yytj83qjH7JFRrAhR4/25ix9K?= =?us-ascii?Q?i/Vn5rc+JtRE2yqKl2Rz+oSn3Yid737QB7Kkuom85r0/A+SHtCDMqHpjVsPd?= =?us-ascii?Q?Ka+nJhxHGTJmy1yQ3vZY5AqWTINRNf2EbHHqFoOCpR84Yzige9Fvuj/P3toB?= =?us-ascii?Q?vo3KvqS8ObM36PArdNnvp1907pYNeRMQP22EeRMCtefbE520iI5nsLGEgMIf?= =?us-ascii?Q?UUf/mbbbBm+DqtDkVjg/BU/LqYYlI7st1Oh7Jinx/UlBWLN+q3NKDjWDi/HM?= =?us-ascii?Q?Z5+CNWf8ASEdjyMiWsAEIt/UevBD8puG5EZuQ0pP5RaMwgkBCIQog8tED/CY?= =?us-ascii?Q?Bf0vCr20AXAbTbcquLVq6OODz2edw/ptVWGmUWobcae5LeMbpYHAG/2+UZCi?= =?us-ascii?Q?o0DnySKfb14p1BQDAm6pkSo9kRmdZsQAdGZQmxVLoC1jJK1oULLKIhGQU2ow?= =?us-ascii?Q?c+QnORt3IBLePuuJxxdgGqwiBcFhwXmhqjSCttMl7zhhmSR+0ZPt5QAvWN8F?= =?us-ascii?Q?ORTtycOywYQ88arJqo+1ZfsyQgh1p5US/eDPXENE70qHMbRwQ7bUxAxkh9VJ?= =?us-ascii?Q?+1U9WxkTl57F3bSBt6L1wNu7EWZnCPnE4Ko6uvFlllIZce+4K7BgWdApG3r5?= =?us-ascii?Q?4+lkffOjmatmCjg4j1GQugHx+Xn1hs7uFAUzdjUfP+cYHRLuO64gaOmWUo8v?= =?us-ascii?Q?V4eBqnM82bgTzSYCM/vE1q6BIY9Fv/uRlIjMyOnROnM84p8HWcxjioTPj2B6?= =?us-ascii?Q?AwM50BqeTGt148FSTfYOOsFpbc/JBN0BcR6jQPXWdXzw1CdEv72DbI+n/+dU?= =?us-ascii?Q?dminhSD/hE6viXF0a02Wrr0QrLdb1tU6W4wjoyslDhIvP5Htlk9EBpoSdWnn?= =?us-ascii?Q?2muJro24vWNNvPMMiH5KnaPGY0OpZQ5D/bMjKpUuxCc9Z7vExas7++3ugIzM?= =?us-ascii?Q?rBizMX3AcpgF41hZMkOOhfgirkybPzmAYpjhEp6rjOnwPVeZtaQaRv9t4Z32?= =?us-ascii?Q?0oj9a1Sz57ypRHCgwH0z/mkQ/t+mRCV6c3q8rMea?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: ad1e471c-5bad-4923-542d-08da83e2029d X-MS-Exchange-CrossTenant-AuthSource: DB9PR04MB8106.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Aug 2022 01:59:55.8402 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: g/4ctXldwafMtTQG0/splk9TVhecOpbMUnHWNrwERAdXGpw/m9sl2nV/6zvuO10Iiy6h53qTRlIOY/krZ98gdw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR0402MB3335 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Wei Fang Add below features support for both TJA1100 and TJA1101 cards: - Add MII and RMII mode support. - Add REF_CLK input/output support for RMII mode. Signed-off-by: Wei Fang --- V2 change: 1. Correct the property name to "nxp,rmii-refclk-in". 2. Modify the "quirks" of struct tja11xx_priv to "flags". --- drivers/net/phy/nxp-tja11xx.c | 83 ++++++++++++++++++++++++++++++++--- 1 file changed, 78 insertions(+), 5 deletions(-) diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c index 2a8195c50d14..ec91e671f8aa 100644 --- a/drivers/net/phy/nxp-tja11xx.c +++ b/drivers/net/phy/nxp-tja11xx.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -34,6 +35,11 @@ #define MII_CFG1 18 #define MII_CFG1_MASTER_SLAVE BIT(15) #define MII_CFG1_AUTO_OP BIT(14) +#define MII_CFG1_INTERFACE_MODE_MASK GENMASK(9, 8) +#define MII_CFG1_MII_MODE (0x0 << 8) +#define MII_CFG1_RMII_MODE_REFCLK_IN BIT(8) +#define MII_CFG1_RMII_MODE_REFCLK_OUT BIT(9) +#define MII_CFG1_REVMII_MODE GENMASK(9, 8) #define MII_CFG1_SLEEP_CONFIRM BIT(6) #define MII_CFG1_LED_MODE_MASK GENMASK(5, 4) #define MII_CFG1_LED_MODE_LINKUP 0 @@ -72,11 +78,15 @@ #define MII_COMMCFG 27 #define MII_COMMCFG_AUTO_OP BIT(15) +/* Configure REF_CLK as input in RMII mode */ +#define TJA110X_RMII_MODE_REFCLK_IN BIT(0) + struct tja11xx_priv { char *hwmon_name; struct device *hwmon_dev; struct phy_device *phydev; struct work_struct phy_register_work; + u32 flags; }; struct tja11xx_phy_stats { @@ -251,8 +261,34 @@ static int tja11xx_config_aneg(struct phy_device *phydev) return __genphy_config_aneg(phydev, changed); } +static int tja11xx_get_interface_mode(struct phy_device *phydev) +{ + struct tja11xx_priv *priv = phydev->priv; + int mii_mode; + + switch (phydev->interface) { + case PHY_INTERFACE_MODE_MII: + mii_mode = MII_CFG1_MII_MODE; + break; + case PHY_INTERFACE_MODE_REVMII: + mii_mode = MII_CFG1_REVMII_MODE; + break; + case PHY_INTERFACE_MODE_RMII: + if (priv->flags & TJA110X_RMII_MODE_REFCLK_IN) + mii_mode = MII_CFG1_RMII_MODE_REFCLK_IN; + else + mii_mode = MII_CFG1_RMII_MODE_REFCLK_OUT; + break; + default: + return -EINVAL; + } + + return mii_mode; +} + static int tja11xx_config_init(struct phy_device *phydev) { + u16 reg_mask, reg_val; int ret; ret = tja11xx_enable_reg_write(phydev); @@ -265,15 +301,32 @@ static int tja11xx_config_init(struct phy_device *phydev) switch (phydev->phy_id & PHY_ID_MASK) { case PHY_ID_TJA1100: - ret = phy_modify(phydev, MII_CFG1, - MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_MASK | - MII_CFG1_LED_ENABLE, - MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_LINKUP | - MII_CFG1_LED_ENABLE); + reg_mask = MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_MASK | + MII_CFG1_LED_ENABLE; + reg_val = MII_CFG1_AUTO_OP | MII_CFG1_LED_MODE_LINKUP | + MII_CFG1_LED_ENABLE; + + reg_mask |= MII_CFG1_INTERFACE_MODE_MASK; + ret = tja11xx_get_interface_mode(phydev); + if (ret < 0) + return ret; + + reg_val |= (ret & 0xffff); + ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val); if (ret) return ret; break; case PHY_ID_TJA1101: + reg_mask = MII_CFG1_INTERFACE_MODE_MASK; + ret = tja11xx_get_interface_mode(phydev); + if (ret < 0) + return ret; + + reg_val = ret & 0xffff; + ret = phy_modify(phydev, MII_CFG1, reg_mask, reg_val); + if (ret) + return ret; + fallthrough; case PHY_ID_TJA1102: ret = phy_set_bits(phydev, MII_COMMCFG, MII_COMMCFG_AUTO_OP); if (ret) @@ -458,16 +511,36 @@ static int tja11xx_hwmon_register(struct phy_device *phydev, return PTR_ERR_OR_ZERO(priv->hwmon_dev); } +static int tja11xx_parse_dt(struct phy_device *phydev) +{ + struct device_node *node = phydev->mdio.dev.of_node; + struct tja11xx_priv *priv = phydev->priv; + + if (!IS_ENABLED(CONFIG_OF_MDIO)) + return 0; + + if (of_property_read_bool(node, "nxp,rmii-refclk-in")) + priv->flags |= TJA110X_RMII_MODE_REFCLK_IN; + + return 0; +} + static int tja11xx_probe(struct phy_device *phydev) { struct device *dev = &phydev->mdio.dev; struct tja11xx_priv *priv; + int ret; priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); if (!priv) return -ENOMEM; priv->phydev = phydev; + phydev->priv = priv; + + ret = tja11xx_parse_dt(phydev); + if (ret) + return ret; return tja11xx_hwmon_register(phydev, priv); } -- 2.25.1