From: Like Xu <like.xu.linux@gmail.com>
To: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 1/7] KVM: x86/pmu: Avoid setting BIT_ULL(-1) to pmu->host_cross_mapped_mask
Date: Wed, 31 Aug 2022 16:53:22 +0800 [thread overview]
Message-ID: <20220831085328.45489-2-likexu@tencent.com> (raw)
In-Reply-To: <20220831085328.45489-1-likexu@tencent.com>
From: Like Xu <likexu@tencent.com>
In the extreme case of host counters multiplexing and contention, the
perf_event requested by the guest's pebs counter is not allocated to any
actual physical counter, in which case hw.idx is bookkept as -1,
resulting in an out-of-bounds access to host_cross_mapped_mask.
Fixes: 854250329c02 ("KVM: x86/pmu: Disable guest PEBS temporarily in two rare situations")
Signed-off-by: Like Xu <likexu@tencent.com>
---
arch/x86/kvm/vmx/pmu_intel.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index c399637a3a79..d595ff33d32d 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -776,20 +776,20 @@ static void intel_pmu_cleanup(struct kvm_vcpu *vcpu)
void intel_pmu_cross_mapped_check(struct kvm_pmu *pmu)
{
struct kvm_pmc *pmc = NULL;
- int bit;
+ int bit, hw_idx;
for_each_set_bit(bit, (unsigned long *)&pmu->global_ctrl,
X86_PMC_IDX_MAX) {
pmc = intel_pmc_idx_to_pmc(pmu, bit);
if (!pmc || !pmc_speculative_in_use(pmc) ||
- !intel_pmc_is_enabled(pmc))
+ !intel_pmc_is_enabled(pmc) || !pmc->perf_event)
continue;
- if (pmc->perf_event && pmc->idx != pmc->perf_event->hw.idx) {
- pmu->host_cross_mapped_mask |=
- BIT_ULL(pmc->perf_event->hw.idx);
- }
+ hw_idx = pmc->perf_event->hw.idx;
+ /* make it a little less dependent on perf's exact behavior */
+ if (hw_idx != pmc->idx && hw_idx > -1)
+ pmu->host_cross_mapped_mask |= BIT_ULL(hw_idx);
}
}
--
2.37.3
next prev parent reply other threads:[~2022-08-31 8:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 8:53 [PATCH v3 0/7] x86/pmu: Corner cases fixes and optimization Like Xu
2022-08-31 8:53 ` Like Xu [this message]
2022-09-22 22:30 ` [PATCH v3 1/7] KVM: x86/pmu: Avoid setting BIT_ULL(-1) to pmu->host_cross_mapped_mask Sean Christopherson
2022-08-31 8:53 ` [PATCH v3 2/7] KVM: x86/pmu: Don't generate PEBS records for emulated instructions Like Xu
2022-08-31 8:53 ` [PATCH v3 3/7] KVM: x86/pmu: Avoid using PEBS perf_events for normal counters Like Xu
2022-09-22 22:35 ` Sean Christopherson
2022-08-31 8:53 ` [PATCH v3 4/7] KVM: x86/pmu: Defer reprogram_counter() to kvm_pmu_handle_event() Like Xu
2022-09-22 23:18 ` Sean Christopherson
2022-08-31 8:53 ` [PATCH v3 5/7] KVM: x86/pmu: Defer counter emulated overflow via pmc->prev_counter Like Xu
2022-09-22 23:59 ` Sean Christopherson
2022-10-14 8:08 ` Like Xu
2022-08-31 8:53 ` [PATCH v3 6/7] KVM: x86/svm/pmu: Direct access pmu->gp_counter[] to implement amd_*_to_pmc() Like Xu
2022-08-31 8:53 ` [PATCH v3 7/7] KVM: x86/svm/pmu: Rewrite get_gp_pmc_amd() for more counters scalability Like Xu
2022-09-07 9:52 ` [PATCH v3 0/7] x86/pmu: Corner cases fixes and optimization Like Xu
2022-09-19 8:58 ` Like Xu
2022-09-22 22:29 ` Sean Christopherson
2022-09-22 23:11 ` Sean Christopherson
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