From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>, Jason Gunthorpe <jgg@nvidia.com>,
Christoph Hellwig <hch@infradead.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Kevin Tian <kevin.tian@intel.com>,
Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Jean-Philippe Brucker <jean-philippe@linaro.com>,
Dave Jiang <dave.jiang@intel.com>,
Fenghua Yu <fenghua.yu@intel.com>, Vinod Koul <vkoul@kernel.org>
Cc: Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>,
Jacob jun Pan <jacob.jun.pan@intel.com>,
Zhangfei Gao <zhangfei.gao@linaro.org>,
Zhu Tony <tony.zhu@intel.com>,
iommu@lists.linux.dev, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Lu Baolu <baolu.lu@linux.intel.com>,
Jean-Philippe Brucker <jean-philippe@linaro.org>
Subject: [PATCH v13 06/13] iommu: Add IOMMU SVA domain support
Date: Tue, 6 Sep 2022 20:44:51 +0800 [thread overview]
Message-ID: <20220906124458.46461-7-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20220906124458.46461-1-baolu.lu@linux.intel.com>
The SVA iommu_domain represents a hardware pagetable that the IOMMU
hardware could use for SVA translation. This adds some infrastructures
to support SVA domain in the iommu core. It includes:
- Extend the iommu_domain to support a new IOMMU_DOMAIN_SVA domain
type. The IOMMU drivers that support allocation of the SVA domain
should provide its own SVA domain specific iommu_domain_ops.
- Add a helper to allocate an SVA domain. The iommu_domain_free()
is still used to free an SVA domain.
The report_iommu_fault() should be replaced by the new
iommu_report_device_fault(). Leave the existing fault handler with the
existing users and the newly added SVA members excludes it.
Suggested-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Suggested-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
Tested-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: Tony Zhu <tony.zhu@intel.com>
---
include/linux/iommu.h | 25 +++++++++++++++++++++++--
drivers/iommu/iommu.c | 20 ++++++++++++++++++++
2 files changed, 43 insertions(+), 2 deletions(-)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index 7332caeea43b..c45236d95355 100644
--- a/include/linux/iommu.h
+++ b/include/linux/iommu.h
@@ -64,6 +64,8 @@ struct iommu_domain_geometry {
#define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */
#define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */
+#define __IOMMU_DOMAIN_SVA (1U << 4) /* Shared process address space */
+
/*
* This are the possible domain-types
*
@@ -77,6 +79,8 @@ struct iommu_domain_geometry {
* certain optimizations for these domains
* IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB
* invalidation.
+ * IOMMU_DOMAIN_SVA - DMA addresses are shared process addresses
+ * represented by mm_struct's.
*/
#define IOMMU_DOMAIN_BLOCKED (0U)
#define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT)
@@ -86,15 +90,24 @@ struct iommu_domain_geometry {
#define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \
__IOMMU_DOMAIN_DMA_API | \
__IOMMU_DOMAIN_DMA_FQ)
+#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SVA)
struct iommu_domain {
unsigned type;
const struct iommu_domain_ops *ops;
unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */
- iommu_fault_handler_t handler;
- void *handler_token;
struct iommu_domain_geometry geometry;
struct iommu_dma_cookie *iova_cookie;
+ union {
+ struct {
+ iommu_fault_handler_t handler;
+ void *handler_token;
+ };
+ struct { /* IOMMU_DOMAIN_SVA */
+ struct mm_struct *mm;
+ int users;
+ };
+ };
};
static inline bool iommu_is_dma_domain(struct iommu_domain *domain)
@@ -687,6 +700,8 @@ int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner);
void iommu_group_release_dma_owner(struct iommu_group *group);
bool iommu_group_dma_owner_claimed(struct iommu_group *group);
+struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
+ struct mm_struct *mm);
int iommu_attach_device_pasid(struct iommu_domain *domain,
struct device *dev, ioasid_t pasid);
void iommu_detach_device_pasid(struct iommu_domain *domain,
@@ -1062,6 +1077,12 @@ static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group)
return false;
}
+static inline struct iommu_domain *
+iommu_sva_domain_alloc(struct device *dev, struct mm_struct *mm)
+{
+ return NULL;
+}
+
static inline int iommu_attach_device_pasid(struct iommu_domain *domain,
struct device *dev, ioasid_t pasid)
{
diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
index 4ac4fd7d94f6..2d0a1688725a 100644
--- a/drivers/iommu/iommu.c
+++ b/drivers/iommu/iommu.c
@@ -27,6 +27,7 @@
#include <linux/module.h>
#include <linux/cc_platform.h>
#include <trace/events/iommu.h>
+#include <linux/sched/mm.h>
static struct kset *iommu_group_kset;
static DEFINE_IDA(iommu_group_ida);
@@ -1960,6 +1961,8 @@ EXPORT_SYMBOL_GPL(iommu_domain_alloc);
void iommu_domain_free(struct iommu_domain *domain)
{
+ if (domain->type == IOMMU_DOMAIN_SVA)
+ mmdrop(domain->mm);
iommu_put_dma_cookie(domain);
domain->ops->free(domain);
}
@@ -3388,3 +3391,20 @@ struct iommu_domain *iommu_get_domain_for_dev_pasid(struct device *dev,
return domain;
}
EXPORT_SYMBOL_GPL(iommu_get_domain_for_dev_pasid);
+
+struct iommu_domain *iommu_sva_domain_alloc(struct device *dev,
+ struct mm_struct *mm)
+{
+ const struct iommu_ops *ops = dev_iommu_ops(dev);
+ struct iommu_domain *domain;
+
+ domain = ops->domain_alloc(IOMMU_DOMAIN_SVA);
+ if (!domain)
+ return NULL;
+
+ domain->type = IOMMU_DOMAIN_SVA;
+ mmgrab(mm);
+ domain->mm = mm;
+
+ return domain;
+}
--
2.25.1
next prev parent reply other threads:[~2022-09-06 12:52 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-06 12:44 [PATCH v13 00/13] iommu: SVA and IOPF refactoring Lu Baolu
2022-09-06 12:44 ` [PATCH v13 01/13] iommu: Add max_pasids field in struct iommu_device Lu Baolu
2022-09-06 12:44 ` [PATCH v13 02/13] iommu: Add max_pasids field in struct dev_iommu Lu Baolu
2022-09-06 12:44 ` [PATCH v13 03/13] iommu: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu
2022-09-06 12:44 ` [PATCH v13 04/13] PCI: Enable PASID only when ACS RR & UF enabled on upstream path Lu Baolu
2022-09-06 12:44 ` [PATCH v13 05/13] iommu: Add attach/detach_dev_pasid iommu interfaces Lu Baolu
2022-09-22 15:49 ` Jason Gunthorpe
2022-09-06 12:44 ` Lu Baolu [this message]
2022-09-06 12:44 ` [PATCH v13 07/13] iommu/vt-d: Add SVA domain support Lu Baolu
2022-09-22 15:49 ` Jason Gunthorpe
2022-09-23 2:21 ` Baolu Lu
2022-09-23 12:15 ` Jason Gunthorpe
2022-09-23 12:41 ` Baolu Lu
2022-09-23 13:07 ` Jason Gunthorpe
2022-09-23 13:12 ` Baolu Lu
2022-09-06 12:44 ` [PATCH v13 08/13] arm-smmu-v3/sva: " Lu Baolu
2022-09-22 15:53 ` Jason Gunthorpe
2022-09-06 12:44 ` [PATCH v13 09/13] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Lu Baolu
2022-09-06 16:36 ` Jean-Philippe Brucker
2022-09-07 1:27 ` Baolu Lu
2022-09-07 9:54 ` Jean-Philippe Brucker
2022-09-07 17:33 ` Jason Gunthorpe
2022-09-08 16:25 ` Jean-Philippe Brucker
2022-09-08 16:41 ` Jason Gunthorpe
2022-09-09 1:54 ` Baolu Lu
2022-09-22 16:00 ` Jason Gunthorpe
2022-09-23 2:31 ` Baolu Lu
2022-09-06 12:44 ` [PATCH v13 10/13] iommu: Remove SVA related callbacks from iommu ops Lu Baolu
2022-09-06 12:44 ` [PATCH v13 11/13] iommu: Prepare IOMMU domain for IOPF Lu Baolu
2022-09-22 16:05 ` Jason Gunthorpe
2022-09-06 12:44 ` [PATCH v13 12/13] iommu: Per-domain I/O page fault handling Lu Baolu
2022-09-06 12:44 ` [PATCH v13 13/13] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu
2022-09-12 3:05 ` [PATCH v13 00/13] iommu: SVA and IOPF refactoring Baolu Lu
2022-09-23 13:08 ` Baolu Lu
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