From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C42AC4332F for ; Fri, 30 Sep 2022 19:30:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231928AbiI3Tac (ORCPT ); Fri, 30 Sep 2022 15:30:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231740AbiI3TaR (ORCPT ); Fri, 30 Sep 2022 15:30:17 -0400 Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E42BB2C665 for ; Fri, 30 Sep 2022 12:30:02 -0700 (PDT) Received: by mail-lj1-x22b.google.com with SMTP id s10so5806122ljp.5 for ; Fri, 30 Sep 2022 12:30:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=Lb2yg7Pt4DxTka9+KV6Co4SrBHPOoUuiBCx5duzCR9A=; b=b7FJzs0y0ZOg+uDpLQWkuySxRK/xEdxb73N2jzPsSJuZf+nW58jEMPA3iQJMkW1iNN 0uylutnZEq014/NLKw3YyGeUjVMuvWyWR84AVZOb2FdvjgBy4xF/3apFGKszY5YsKXw6 Aixa9bxwx7SLB9JSBkOpXnIqz5CYq/HuaRC7zsUioNZqdGL3FVQCXcY546L2mglPZS/r 23CaktcHLv/DoLeAcYYYCQKR6b1RlDiw/im2InpHcz4GW11L1wgq8+FN7bYN/ROyVLEL dm6cE0bfVx1N/UsP9vlDq2Bob5m7sx6+Slu8MmfRyJKMXT0VOxV0z4+1P3PGLXl726e0 UTgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=Lb2yg7Pt4DxTka9+KV6Co4SrBHPOoUuiBCx5duzCR9A=; b=k+AsvtP1BJqgtprBV2tIG+HkuRpHRpxp6AmBtsD28Lt1AsulZMoOZbCNaevXVvxv08 GyYjC6JaeFzpz2/3KAOF2fYb5Cc0TbCDMxqUTiaywhGHWXzE0pOL/3DOuzzPU2dcEst7 oRKdp8dwxCjf/pKexsfYCFWcOREJ8aQXL0ZWFf7Eh1uSufrJeUlBy6/7w23Q5Ym/whvx X/vwXe7ji6hMjTCW3U9SK2T7iehiUSskRlUs1xH8P9vLkRrqXmAd0yiQDU8uZ7V+q7d3 7TNHg60TdO2nSaSA+VBETS5+G20VpjpyvEELZO27o1QhkM720RKsxGeCSq61Rmf5+XN5 FxBg== X-Gm-Message-State: ACrzQf0aG7CpEEKJlVivCD2aHOdrQnKgHvNVeKv8aUFSmjRkysPncNLb 0WCEPVb62+pF/VvAeLAb7cvBtg== X-Google-Smtp-Source: AMsMyM77CLzXh4xZxRxEciMDgQAB2TqSrV7Ow+HBHesd0WBCQkdu0+TKE7+uxlf/vB5B556MNZ62yg== X-Received: by 2002:a05:651c:239c:b0:26d:94b8:781d with SMTP id bk28-20020a05651c239c00b0026d94b8781dmr3101983ljb.189.1664566200595; Fri, 30 Sep 2022 12:30:00 -0700 (PDT) Received: from krzk-bin.. (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id br32-20020a056512402000b0049f9799d349sm393603lfb.187.2022.09.30.12.29.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Sep 2022 12:30:00 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 03/16] arm64: dts: qcom: sc8280xp: align TLMM pin configuration with DT schema Date: Fri, 30 Sep 2022 21:29:41 +0200 Message-Id: <20220930192954.242546-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220930192954.242546-1-krzysztof.kozlowski@linaro.org> References: <20220930192954.242546-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. qcom/sc8280xp-crd.dtb: pinctrl@f100000: kybd-default-state: 'oneOf' conditional failed, one must be fixed: 'pins' is a required property 'function' is a required property 'disable', 'int-n', 'reset' do not match any of the regexes: 'pinctrl-[0-9]+' 'disable', 'int-n', 'reset' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' Reviewed-by: Konrad Dybcio Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 ++++++------ .../boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts index fea7d8273ccd..a2027f1d1d04 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts @@ -374,19 +374,19 @@ &tlmm { gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; kybd_default: kybd-default-state { - disable { + disable-pins { pins = "gpio102"; function = "gpio"; output-low; }; - int-n { + int-n-pins { pins = "gpio104"; function = "gpio"; bias-disable; }; - reset { + reset-pins { pins = "gpio105"; function = "gpio"; bias-disable; @@ -410,7 +410,7 @@ qup2_i2c5_default: qup2-i2c5-default-state { }; tpad_default: tpad-default-state { - int-n { + int-n-pins { pins = "gpio182"; function = "gpio"; bias-disable; @@ -418,13 +418,13 @@ int-n { }; ts0_default: ts0-default-state { - int-n { + int-n-pins { pins = "gpio175"; function = "gpio"; bias-disable; }; - reset-n { + reset-n-pins { pins = "gpio99"; function = "gpio"; output-high; diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index b2b744bb8a53..68b61e8d03c0 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -350,19 +350,19 @@ &tlmm { gpio-reserved-ranges = <70 2>, <74 6>, <83 4>, <125 2>, <128 2>, <154 7>; kybd_default: kybd-default-state { - disable { + disable-pins { pins = "gpio102"; function = "gpio"; output-low; }; - int-n { + int-n-pins { pins = "gpio104"; function = "gpio"; bias-disable; }; - reset { + reset-pins { pins = "gpio105"; function = "gpio"; bias-disable; @@ -384,7 +384,7 @@ qup2_i2c5_default: qup2-i2c5-default-state { }; tpad_default: tpad-default-state { - int-n { + int-n-pins { pins = "gpio182"; function = "gpio"; bias-disable; @@ -392,13 +392,13 @@ int-n { }; ts0_default: ts0-default-state { - int-n { + int-n-pins { pins = "gpio175"; function = "gpio"; bias-disable; }; - reset-n { + reset-n-pins { pins = "gpio99"; function = "gpio"; output-high; -- 2.34.1