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* [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path
@ 2022-10-09  6:44 Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity Jianmin Lv
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Jianmin Lv @ 2022-10-09  6:44 UTC (permalink / raw)
  To: Thomas Gleixner, Marc Zyngier
  Cc: linux-kernel, loongarch, Jiaxun Yang, Huacai Chen, Bjorn Helgaas,
	Len Brown, rafael, linux-pci, linux-acpi

For ACPI path of pch-pic and liointc driver, setting irq
type is not supported yet, so the patch series add code
to implement it.

And a bug in translate callback of irqchip/loongson-pch-pic, which
is introduced by previous patch, is fixed.

GSI for legacy irqs of PCI devices are mapped in pch-pic domain, after
supporting setting_irq_type for pch-pic domain, we add the workaround
for LoongArch based PCI controller with high-level trigger intterrupt
so that the high-level trigger type is passed into acpi_register_gsi().
  
V1 -> V2
- Change comment information and fix a bug for DT path in patch[1].

V2 -> V3
- Separate original patch[1] to three patches[1][2][3].

Jianmin Lv (4):
  ACPI / PCI: fix LPIC irq model default PCI IRQ polarity
  irqchip/loongson-pch-pic: fix translate callback for DT path
  irqchip/loongson-pch-pic: Support to set irq type for ACPI path
  irqchip/loongson-liointc: Support to set irq type for ACPI path

 drivers/acpi/pci_irq.c                 |  6 ++++--
 drivers/irqchip/irq-loongson-liointc.c |  7 ++++++-
 drivers/irqchip/irq-loongson-pch-pic.c | 14 ++++++++++----
 3 files changed, 20 insertions(+), 7 deletions(-)

-- 
2.31.1


^ permalink raw reply	[flat|nested] 7+ messages in thread

* [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity
  2022-10-09  6:44 [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path Jianmin Lv
@ 2022-10-09  6:44 ` Jianmin Lv
  2022-10-19 16:05   ` Bjorn Helgaas
  2022-10-09  6:44 ` [PATCH V3 2/4] irqchip/loongson-pch-pic: fix translate callback for DT path Jianmin Lv
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 7+ messages in thread
From: Jianmin Lv @ 2022-10-09  6:44 UTC (permalink / raw)
  To: Thomas Gleixner, Marc Zyngier
  Cc: linux-kernel, loongarch, Jiaxun Yang, Huacai Chen, Bjorn Helgaas,
	Len Brown, rafael, linux-pci, linux-acpi

On LoongArch ACPI based systems, the irq trigger type of PCI devices
is high level, so high level triggered type is required to pass
to acpi_register_gsi when create irq mapping for PCI devices.

Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
 drivers/acpi/pci_irq.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index 08e15774fb9f..ff30ceca2203 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
 	u8 pin;
 	int triggering = ACPI_LEVEL_SENSITIVE;
 	/*
-	 * On ARM systems with the GIC interrupt model, level interrupts
+	 * On ARM systems with the GIC interrupt model, or LoongArch
+	 * systems with the LPIC interrupt model, level interrupts
 	 * are always polarity high by specification; PCI legacy
 	 * IRQs lines are inverted before reaching the interrupt
 	 * controller and must therefore be considered active high
 	 * as default.
 	 */
-	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
+	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
+		       acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
 				      ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
 	char *link = NULL;
 	char link_desc[16];
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH V3 2/4] irqchip/loongson-pch-pic: fix translate callback for DT path
  2022-10-09  6:44 [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity Jianmin Lv
@ 2022-10-09  6:44 ` Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 3/4] irqchip/loongson-pch-pic: Support to set irq type for ACPI path Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 4/4] irqchip/loongson-liointc: " Jianmin Lv
  3 siblings, 0 replies; 7+ messages in thread
From: Jianmin Lv @ 2022-10-09  6:44 UTC (permalink / raw)
  To: Thomas Gleixner, Marc Zyngier
  Cc: linux-kernel, loongarch, Jiaxun Yang, Huacai Chen, Bjorn Helgaas,
	Len Brown, rafael, linux-pci, linux-acpi

In DT path of translate callback, if fwspec->param_count==1
and of_node is non-null, fwspec->param[1] will be accessed,
which is introduced from previous commit bcdd75c596c8
(irqchip/loongson-pch-pic: Add ACPI init support).

Before the patch, for non-null of_node, translate callback
(use irq_domain_translate_twocell) will return -EINVAL if
fwspec->param_count < 2, so the check in the patch is added.

Fixes: bcdd75c596c8 ("irqchip/loongson-pch-pic: Add ACPI init support")
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
 drivers/irqchip/irq-loongson-pch-pic.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index c01b9c257005..03493cda65a3 100644
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -159,6 +159,9 @@ static int pch_pic_domain_translate(struct irq_domain *d,
 		return -EINVAL;
 
 	if (of_node) {
+		if (fwspec->param_count < 2)
+			return -EINVAL;
+
 		*hwirq = fwspec->param[0] + priv->ht_vec_base;
 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
 	} else {
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH V3 3/4] irqchip/loongson-pch-pic: Support to set irq type for ACPI path
  2022-10-09  6:44 [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 2/4] irqchip/loongson-pch-pic: fix translate callback for DT path Jianmin Lv
@ 2022-10-09  6:44 ` Jianmin Lv
  2022-10-09  6:44 ` [PATCH V3 4/4] irqchip/loongson-liointc: " Jianmin Lv
  3 siblings, 0 replies; 7+ messages in thread
From: Jianmin Lv @ 2022-10-09  6:44 UTC (permalink / raw)
  To: Thomas Gleixner, Marc Zyngier
  Cc: linux-kernel, loongarch, Jiaxun Yang, Huacai Chen, Bjorn Helgaas,
	Len Brown, rafael, linux-pci, linux-acpi

For ACPI path, the translate callback used IRQ_TYPE_NONE and ignored
the irq type in fwspec->param[1]. For supporting to set type for
irqs of the irqdomain, fwspec->param[1] should be used to get irq
type.

Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
 drivers/irqchip/irq-loongson-pch-pic.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-loongson-pch-pic.c b/drivers/irqchip/irq-loongson-pch-pic.c
index 03493cda65a3..a26a3f59d4a5 100644
--- a/drivers/irqchip/irq-loongson-pch-pic.c
+++ b/drivers/irqchip/irq-loongson-pch-pic.c
@@ -155,9 +155,6 @@ static int pch_pic_domain_translate(struct irq_domain *d,
 	struct pch_pic *priv = d->host_data;
 	struct device_node *of_node = to_of_node(fwspec->fwnode);
 
-	if (fwspec->param_count < 1)
-		return -EINVAL;
-
 	if (of_node) {
 		if (fwspec->param_count < 2)
 			return -EINVAL;
@@ -165,8 +162,14 @@ static int pch_pic_domain_translate(struct irq_domain *d,
 		*hwirq = fwspec->param[0] + priv->ht_vec_base;
 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
 	} else {
+		if (fwspec->param_count < 1)
+			return -EINVAL;
+
 		*hwirq = fwspec->param[0] - priv->gsi_base;
-		*type = IRQ_TYPE_NONE;
+		if (fwspec->param_count > 1)
+			*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;
+		else
+			*type = IRQ_TYPE_NONE;
 	}
 
 	return 0;
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH V3 4/4] irqchip/loongson-liointc: Support to set irq type for ACPI path
  2022-10-09  6:44 [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path Jianmin Lv
                   ` (2 preceding siblings ...)
  2022-10-09  6:44 ` [PATCH V3 3/4] irqchip/loongson-pch-pic: Support to set irq type for ACPI path Jianmin Lv
@ 2022-10-09  6:44 ` Jianmin Lv
  3 siblings, 0 replies; 7+ messages in thread
From: Jianmin Lv @ 2022-10-09  6:44 UTC (permalink / raw)
  To: Thomas Gleixner, Marc Zyngier
  Cc: linux-kernel, loongarch, Jiaxun Yang, Huacai Chen, Bjorn Helgaas,
	Len Brown, rafael, linux-pci, linux-acpi

For ACPI path, the xlate callback used IRQ_TYPE_NONE and ignored
the irq type in intspec[1]. For supporting to set type for
irqs of the irqdomain, intspec[1] should be used to get irq
type.

Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
---
 drivers/irqchip/irq-loongson-liointc.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/irqchip/irq-loongson-liointc.c b/drivers/irqchip/irq-loongson-liointc.c
index 0da8716f8f24..838c8fa2d868 100644
--- a/drivers/irqchip/irq-loongson-liointc.c
+++ b/drivers/irqchip/irq-loongson-liointc.c
@@ -167,7 +167,12 @@ static int liointc_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
 	if (WARN_ON(intsize < 1))
 		return -EINVAL;
 	*out_hwirq = intspec[0] - GSI_MIN_CPU_IRQ;
-	*out_type = IRQ_TYPE_NONE;
+
+	if (intsize > 1)
+		*out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+	else
+		*out_type = IRQ_TYPE_NONE;
+
 	return 0;
 }
 
-- 
2.31.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity
  2022-10-09  6:44 ` [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity Jianmin Lv
@ 2022-10-19 16:05   ` Bjorn Helgaas
  2022-10-20  3:16     ` Jianmin Lv
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2022-10-19 16:05 UTC (permalink / raw)
  To: Jianmin Lv
  Cc: Thomas Gleixner, Marc Zyngier, linux-kernel, loongarch,
	Jiaxun Yang, Huacai Chen, Bjorn Helgaas, Len Brown, rafael,
	linux-pci, linux-acpi

In the subject and the commit log below, figure out whether you want
to use "irq" or "IRQ" and do it consistently.  I vote for "IRQ".  Also
consider subject lines for the other patches.  Stuff like this is
trivial, but it's an excuse for whoever will handle this (not me in
this case) to put it off.  I also add "()" after function names for
clarity.

On Sun, Oct 09, 2022 at 02:44:28PM +0800, Jianmin Lv wrote:
> On LoongArch ACPI based systems, the irq trigger type of PCI devices
> is high level, so high level triggered type is required to pass
> to acpi_register_gsi when create irq mapping for PCI devices.

This isn't worded quite right.  The trigger type of PCI devices
doesn't change just because you plug them into a LoongArch system
instead of an x86 system.  The comment in the code reads better: The
IRQs are active low from the perspective of PCI, but are inverted
before the interrupt controller.

Including a reference here to the spec that mentions this inversion
would help a lot.

s/when create mapping/when creating mappings/

> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
> ---
>  drivers/acpi/pci_irq.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
> index 08e15774fb9f..ff30ceca2203 100644
> --- a/drivers/acpi/pci_irq.c
> +++ b/drivers/acpi/pci_irq.c
> @@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
>  	u8 pin;
>  	int triggering = ACPI_LEVEL_SENSITIVE;
>  	/*
> -	 * On ARM systems with the GIC interrupt model, level interrupts
> +	 * On ARM systems with the GIC interrupt model, or LoongArch
> +	 * systems with the LPIC interrupt model, level interrupts
>  	 * are always polarity high by specification; PCI legacy
>  	 * IRQs lines are inverted before reaching the interrupt
>  	 * controller and must therefore be considered active high
>  	 * as default.
>  	 */
> -	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
> +	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
> +		       acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
>  				      ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
>  	char *link = NULL;
>  	char link_desc[16];
> -- 
> 2.31.1
> 

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity
  2022-10-19 16:05   ` Bjorn Helgaas
@ 2022-10-20  3:16     ` Jianmin Lv
  0 siblings, 0 replies; 7+ messages in thread
From: Jianmin Lv @ 2022-10-20  3:16 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: Thomas Gleixner, Marc Zyngier, linux-kernel, loongarch,
	Jiaxun Yang, Huacai Chen, Bjorn Helgaas, Len Brown, rafael,
	linux-pci, linux-acpi

Ok, thanks, I'll improve them as your suggestion.

On 2022/10/20 上午12:05, Bjorn Helgaas wrote:
> In the subject and the commit log below, figure out whether you want
> to use "irq" or "IRQ" and do it consistently.  I vote for "IRQ".  Also
> consider subject lines for the other patches.  Stuff like this is
> trivial, but it's an excuse for whoever will handle this (not me in
> this case) to put it off.  I also add "()" after function names for
> clarity.
> 
> On Sun, Oct 09, 2022 at 02:44:28PM +0800, Jianmin Lv wrote:
>> On LoongArch ACPI based systems, the irq trigger type of PCI devices
>> is high level, so high level triggered type is required to pass
>> to acpi_register_gsi when create irq mapping for PCI devices.
> 
> This isn't worded quite right.  The trigger type of PCI devices
> doesn't change just because you plug them into a LoongArch system
> instead of an x86 system.  The comment in the code reads better: The
> IRQs are active low from the perspective of PCI, but are inverted
> before the interrupt controller.
> 
> Including a reference here to the spec that mentions this inversion
> would help a lot.
> 
> s/when create mapping/when creating mappings/
> 
>> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
>> ---
>>   drivers/acpi/pci_irq.c | 6 ++++--
>>   1 file changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
>> index 08e15774fb9f..ff30ceca2203 100644
>> --- a/drivers/acpi/pci_irq.c
>> +++ b/drivers/acpi/pci_irq.c
>> @@ -387,13 +387,15 @@ int acpi_pci_irq_enable(struct pci_dev *dev)
>>   	u8 pin;
>>   	int triggering = ACPI_LEVEL_SENSITIVE;
>>   	/*
>> -	 * On ARM systems with the GIC interrupt model, level interrupts
>> +	 * On ARM systems with the GIC interrupt model, or LoongArch
>> +	 * systems with the LPIC interrupt model, level interrupts
>>   	 * are always polarity high by specification; PCI legacy
>>   	 * IRQs lines are inverted before reaching the interrupt
>>   	 * controller and must therefore be considered active high
>>   	 * as default.
>>   	 */
>> -	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ?
>> +	int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
>> +		       acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
>>   				      ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
>>   	char *link = NULL;
>>   	char link_desc[16];
>> -- 
>> 2.31.1
>>


^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2022-10-20  3:16 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-09  6:44 [PATCH V3 0/4] irqchip: Support to set irq type for ACPI path Jianmin Lv
2022-10-09  6:44 ` [PATCH V3 1/4] ACPI / PCI: fix LPIC irq model default PCI IRQ polarity Jianmin Lv
2022-10-19 16:05   ` Bjorn Helgaas
2022-10-20  3:16     ` Jianmin Lv
2022-10-09  6:44 ` [PATCH V3 2/4] irqchip/loongson-pch-pic: fix translate callback for DT path Jianmin Lv
2022-10-09  6:44 ` [PATCH V3 3/4] irqchip/loongson-pch-pic: Support to set irq type for ACPI path Jianmin Lv
2022-10-09  6:44 ` [PATCH V3 4/4] irqchip/loongson-liointc: " Jianmin Lv

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