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From: Zhen Lei <thunder.leizhen@huawei.com>
To: Russell King <linux@armlinux.org.uk>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: Zhen Lei <thunder.leizhen@huawei.com>
Subject: [PATCH v2 2/2] ARM: Make the dumped instructions are consistent with the disassembled ones
Date: Mon, 10 Oct 2022 17:53:46 +0800	[thread overview]
Message-ID: <20221010095346.1957-3-thunder.leizhen@huawei.com> (raw)
In-Reply-To: <20221010095346.1957-1-thunder.leizhen@huawei.com>

In ARM, the mapping of instruction memory is always little-endian, except
some BE-32 supported ARM architectures. Such as ARMv7-R, its instruction
endianness may be BE-32. Of course, its data endianness will also be BE-32
mode. Due to two negatives make a positive, the instruction stored in the
register after reading is in little-endian format. But for the case of
BE-8, the instruction endianness is LE, the instruction stored in the
register after reading is in big-endian format, which is inconsistent
with the disassembled one.

For example:
The content of disassembly:
c0429ee8:       e3500000        cmp     r0, #0
c0429eec:       159f2044        ldrne   r2, [pc, #68]
c0429ef0:       108f2002        addne   r2, pc, r2
c0429ef4:       1882000a        stmne   r2, {r1, r3}
c0429ef8:       e7f000f0        udf     #0

The output of undefined instruction exception:
Internal error: Oops - undefined instruction: 0 [#1] SMP ARM
... ...
Code: 000050e3 44209f15 02208f10 0a008218 (f000f0e7)

This inconveniences the checking of instructions. What's worse is that,
for somebody who don't know about this, might think the instructions are
all broken.

So, when CONFIG_CPU_ENDIAN_BE8=y, let's convert the instructions to
little-endian format before they are printed. The conversion result is
as follows:
Code: e3500000 159f2044 108f2002 1882000a (e7f000f0)

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
 arch/arm/kernel/traps.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 34aa80c09c508c1..50b00c9091f079d 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -193,6 +193,13 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
 				bad = get_user(val, &((u32 __user *)addr)[i]);
 		}
 
+		if (IS_ENABLED(CONFIG_CPU_ENDIAN_BE8)) {
+			if (thumb)
+				val = (__force unsigned int)cpu_to_le16(val);
+			else
+				val = (__force unsigned int)cpu_to_le32(val);
+		}
+
 		if (!bad)
 			p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
 					width, val);
-- 
2.25.1


  parent reply	other threads:[~2022-10-10  9:55 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-10  9:53 [PATCH v2 0/2] ARM: Make the dumped instructions are consistent with the disassembled ones Zhen Lei
2022-10-10  9:53 ` [PATCH v2 1/2] ARM: Fix some check warnings of tool sparse Zhen Lei
2022-10-10 10:20   ` Ard Biesheuvel
2022-10-10 10:58     ` Leizhen (ThunderTown)
2022-10-10 11:06       ` Ard Biesheuvel
2022-10-10 16:08         ` Russell King (Oracle)
2022-10-10 16:14           ` Ard Biesheuvel
2022-10-10 16:17             ` Russell King (Oracle)
2022-10-11  2:29         ` Leizhen (ThunderTown)
2022-10-13 10:51           ` Russell King (Oracle)
2022-10-13 11:34             ` Leizhen (ThunderTown)
2022-11-28  8:39             ` Leizhen (ThunderTown)
2022-10-10 16:05   ` Russell King (Oracle)
2022-10-11  2:13     ` Leizhen (ThunderTown)
2022-10-13  1:28       ` Leizhen (ThunderTown)
2022-10-10  9:53 ` Zhen Lei [this message]
2022-10-10 10:10   ` [PATCH v2 2/2] ARM: Make the dumped instructions are consistent with the disassembled ones Ard Biesheuvel
2022-10-10 10:46     ` Leizhen (ThunderTown)
2022-10-10 11:07       ` Ard Biesheuvel
2022-10-10 11:29         ` Leizhen (ThunderTown)

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