From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0072C4332F for ; Sun, 16 Oct 2022 17:01:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229950AbiJPRBw (ORCPT ); Sun, 16 Oct 2022 13:01:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229902AbiJPRBo (ORCPT ); Sun, 16 Oct 2022 13:01:44 -0400 Received: from mail-qt1-x82e.google.com (mail-qt1-x82e.google.com [IPv6:2607:f8b0:4864:20::82e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF51F37F89 for ; Sun, 16 Oct 2022 10:01:29 -0700 (PDT) Received: by mail-qt1-x82e.google.com with SMTP id g11so6534578qts.1 for ; Sun, 16 Oct 2022 10:01:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cZ9oR+D/ntPl4smbOciC/3TQd2xPuUm410NdDVUtl4c=; b=sFvLfDnGkh1KcA5xPDPEAoWdt5eqsHv5ak1Q34uSDqzEPcPfgigew2U3rcWHubvEDv Cv7yKA7/xxJr4SYeo8Av66Rn0VDXB9lwxxdzbBSVGd7U9WWuEs2frO4z6rc/I4D+iXYT hDIP/rnLx2s5dyij9ATp6BmR1uYeMyeOg+HKMz10gNTxZlgFDLSYkOA5UiR30V/2KL+Q 0H2LVszEAjz/FOwgOwcLL8fqkT4Q51ycOXm5HMel3RoSBUvu8fH0oj0mD5jfD0MyEv0j 2pSemPLdQofczTfVaDvNJJFsBp8ar+flVGxBrxiTCSISOiJDj5dbAvz/Pm/6uR4uWGRj qz0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cZ9oR+D/ntPl4smbOciC/3TQd2xPuUm410NdDVUtl4c=; b=QDBxeT6buPrzGltx0bbeBhWYvUam78U3SUEloMowZg8x3n4qQW9P7rEKq6UtPoBUj9 tQHDEAKmSCXvIbcYNvCcUGXxXQGqDwso5GqzegHVODktPvoo24F8IlCwNi3agB+xg54H BfZI/RNxC4irRorynqiZf8aq9kIkCSsBqtjENcugy9XqNyZWqtOsDYHiaeyJ3+jTlTtj BqKaFsDkaCNi0Ji0gMG4Cl2KsWTb9Jc3lND1tNo53vPt1fQ/mCUKK5nV13QyEd4QqCmL b2MLU1dSBLtOhRKgtcpxUI7tRF6uPrvs6vwFwWR1oPY4PFoprr9pVvMDiXAMJdaN8M+2 8XRg== X-Gm-Message-State: ACrzQf3sbjfocFUSBmuOu6ha3PFxdnfvIkxdtJ98yvU2BSc0JSYTw7Fa D1oRMeKVZ0CeDSLQwESJlnB+og== X-Google-Smtp-Source: AMsMyM5rPCrnpq784dEiH7UjnjuKQnKNFBy6E3HTpgKPw/7KxdgO8+4VVG2zBe3iLn+QwHQP/7g5Hg== X-Received: by 2002:ac8:5849:0:b0:39a:8e35:1bfa with SMTP id h9-20020ac85849000000b0039a8e351bfamr5694157qth.573.1665939688467; Sun, 16 Oct 2022 10:01:28 -0700 (PDT) Received: from krzk-bin.hsd1.pa.comcast.net ([2601:42:0:3450:9b13:d679:7b5b:6921]) by smtp.gmail.com with ESMTPSA id q6-20020a05620a0d8600b006ce7bb8518bsm7539967qkl.5.2022.10.16.10.01.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 16 Oct 2022 10:01:26 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Stephan Gerhold , Shawn Guo , Vinod Koul , krishna Lanka , Sivaprakash Murugesan , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v5 04/34] ARM: dts: qcom: sdx55: align TLMM pin configuration with DT schema Date: Sun, 16 Oct 2022 13:00:05 -0400 Message-Id: <20221016170035.35014-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221016170035.35014-1-krzysztof.kozlowski@linaro.org> References: <20221016170035.35014-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org DT schema expects TLMM pin configuration nodes to be named with '-state' suffix and their optional children with '-pins' suffix. Schema also requires 'function' property, so two nodes for the same gpio (mux and config) should be merged into one. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Bjorn Andersson Reviewed-by: Konrad Dybcio --- .../boot/dts/qcom-sdx55-telit-fn980-tlb.dts | 45 +++++++------------ 1 file changed, 15 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts index a4fa468a095f..ac8b4626ae9a 100644 --- a/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts +++ b/arch/arm/boot/dts/qcom-sdx55-telit-fn980-tlb.dts @@ -282,40 +282,25 @@ &remoteproc_mpss { }; &tlmm { - pcie_ep_clkreq_default: pcie_ep_clkreq_default { - mux { - pins = "gpio56"; - function = "pcie_clkreq"; - }; - config { - pins = "gpio56"; - drive-strength = <2>; - bias-disable; - }; + pcie_ep_clkreq_default: pcie-ep-clkreq-default-state { + pins = "gpio56"; + function = "pcie_clkreq"; + drive-strength = <2>; + bias-disable; }; - pcie_ep_perst_default: pcie_ep_perst_default { - mux { - pins = "gpio57"; - function = "gpio"; - }; - config { - pins = "gpio57"; - drive-strength = <2>; - bias-pull-down; - }; + pcie_ep_perst_default: pcie-ep-perst-default-state { + pins = "gpio57"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; }; - pcie_ep_wake_default: pcie_ep_wake_default { - mux { - pins = "gpio53"; - function = "gpio"; - }; - config { - pins = "gpio53"; - drive-strength = <2>; - bias-disable; - }; + pcie_ep_wake_default: pcie-ep-wake-default-state { + pins = "gpio53"; + function = "gpio"; + drive-strength = <2>; + bias-disable; }; }; -- 2.34.1