From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC884C433FE for ; Wed, 19 Oct 2022 09:32:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233769AbiJSJcP (ORCPT ); Wed, 19 Oct 2022 05:32:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233638AbiJSJ20 (ORCPT ); Wed, 19 Oct 2022 05:28:26 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3996FC4D98; Wed, 19 Oct 2022 02:12:27 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D5B6F6188D; Wed, 19 Oct 2022 09:11:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E6947C433D6; Wed, 19 Oct 2022 09:11:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1666170671; bh=ueAwCMAZ21Z3WumpFmAnkEqCVUSiHtJuAqmbEshjAq0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j7EK8f8YD90Ea4KR5GM1yU76c586mleuF9cUkcE55Rcpn6Ce8KJilowwauRx8C9ZC QAdQ7rUXL/qdn7Cqmn96fTnqYHyUg4nFXjHUCRcKQJmXtx3fW1mVjte2pUSGhjLpQj 4O6ceEWPbeHuZ50B5slBeKQ9DHdTnrjzYpQObWoI= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, =?UTF-8?q?Christian=20K=C3=B6nig?= , Yifan Zha , Hawking Zhang , Alex Deucher , Sasha Levin Subject: [PATCH 6.0 742/862] drm/admgpu: Skip CG/PG on SOC21 under SRIOV VF Date: Wed, 19 Oct 2022 10:33:49 +0200 Message-Id: <20221019083322.734583373@linuxfoundation.org> X-Mailer: git-send-email 2.38.0 In-Reply-To: <20221019083249.951566199@linuxfoundation.org> References: <20221019083249.951566199@linuxfoundation.org> User-Agent: quilt/0.67 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yifan Zha [ Upstream commit 828418259254863e0af5805bd712284e2bd88e3b ] [Why] There is no CG(Clock Gating)/PG(Power Gating) requirement on SRIOV VF. For multi VF, VF should not enable any CG/PG features. For one VF, PF will program CG/PG related registers. [How] Do not set any cg/pg flag bit at early init under sriov. Acked-by: Christian König Signed-off-by: Yifan Zha Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin --- drivers/gpu/drm/amd/amdgpu/soc21.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c index 276ff6709881..9c3463b48139 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc21.c +++ b/drivers/gpu/drm/amd/amdgpu/soc21.c @@ -583,6 +583,10 @@ static int soc21_common_early_init(void *handle) AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_ATHUB | AMD_PG_SUPPORT_MMHUB; + if (amdgpu_sriov_vf(adev)) { + adev->cg_flags = 0; + adev->pg_flags = 0; + } adev->external_rev_id = adev->rev_id + 0x1; // TODO: need update break; case IP_VERSION(11, 0, 2): -- 2.35.1