From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B29DEC43219 for ; Wed, 19 Oct 2022 15:11:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232185AbiJSPK7 (ORCPT ); Wed, 19 Oct 2022 11:10:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52932 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232102AbiJSPKi (ORCPT ); Wed, 19 Oct 2022 11:10:38 -0400 Received: from ironport.ite.com.tw (60-251-196-230.hinet-ip.hinet.net [60.251.196.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07B88140E64 for ; Wed, 19 Oct 2022 08:03:36 -0700 (PDT) Received: from unknown (HELO mse.ite.com.tw) ([192.168.35.30]) by ironport.ite.com.tw with ESMTP; 19 Oct 2022 17:32:40 +0800 Received: from CSBMAIL1.internal.ite.com.tw (CSBMAIL1.internal.ite.com.tw [192.168.65.58]) by mse.ite.com.tw with ESMTP id 29J9WZZT030930; Wed, 19 Oct 2022 17:32:35 +0800 (GMT-8) (envelope-from allen.chen@ite.com.tw) Received: from VirtualBox.internal.ite.com.tw (192.168.70.46) by CSBMAIL1.internal.ite.com.tw (192.168.65.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.14; Wed, 19 Oct 2022 17:32:35 +0800 From: allen CC: Allen Chen , Pin-Yen Lin , Jau-Chih Tseng , Hermes Wu , Kenneth Hung , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , "open list:DRM DRIVERS" , open list Subject: [PATCH v5 2/2] drm/bridge: add it6505 driver to read data-lanes and link-frequencies from dt Date: Wed, 19 Oct 2022 17:32:14 +0800 Message-ID: <20221019093215.8204-3-allen.chen@ite.com.tw> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221019093215.8204-1-allen.chen@ite.com.tw> References: <20221019093215.8204-1-allen.chen@ite.com.tw> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [192.168.70.46] X-ClientProxiedBy: CSBMAIL1.internal.ite.com.tw (192.168.65.58) To CSBMAIL1.internal.ite.com.tw (192.168.65.58) X-TM-SNTS-SMTP: C079D62CC9F8D22120376AE71D522097792B4EAF1ABADFE62749DFEAACBC96D12002:8 X-MAIL: mse.ite.com.tw 29J9WZZT030930 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: allen chen Add driver to read data-lanes and link-frequencies from dt property to restrict output bandwidth. Signed-off-by: Allen chen Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/bridge/ite-it6505.c | 80 +++++++++++++++++++++++++++-- 1 file changed, 77 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index a4302492cf8df..ed4536cde3140 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -437,6 +437,8 @@ struct it6505 { bool powered; bool hpd_state; u32 afe_setting; + u32 max_dpi_pixel_clock; + u32 max_lane_count; enum hdcp_state hdcp_status; struct delayed_work hdcp_work; struct work_struct hdcp_wait_ksv_list; @@ -1476,7 +1478,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505) it6505->lane_count = link->num_lanes; DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training", it6505->lane_count); - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT); + it6505->lane_count = min_t(int, it6505->lane_count, + it6505->max_lane_count); it6505->branch_device = drm_dp_is_branch(it6505->dpcd); DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device", @@ -2912,7 +2915,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge, if (mode->flags & DRM_MODE_FLAG_INTERLACE) return MODE_NO_INTERLACE; - if (mode->clock > DPI_PIXEL_CLK_MAX) + if (mode->clock > it6505->max_dpi_pixel_clock) return MODE_CLOCK_HIGH; it6505->video_info.clock = mode->clock; @@ -3099,10 +3102,32 @@ static int it6505_init_pdata(struct it6505 *it6505) return 0; } +static int it6505_get_data_lanes_count(const struct device_node *endpoint, + const unsigned int min, + const unsigned int max) +{ + int ret; + + ret = of_property_count_u32_elems(endpoint, "data-lanes"); + if (ret < 0) + return ret; + + if (ret < min || ret > max) + return -EINVAL; + + return ret; +} + static void it6505_parse_dt(struct it6505 *it6505) { struct device *dev = &it6505->client->dev; + struct device_node *np = dev->of_node, *ep = NULL; + int len; + u64 link_frequencies; + u32 data_lanes[4]; u32 *afe_setting = &it6505->afe_setting; + u32 *max_lane_count = &it6505->max_lane_count; + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock; it6505->lane_swap_disabled = device_property_read_bool(dev, "no-laneswap"); @@ -3118,7 +3143,56 @@ static void it6505_parse_dt(struct it6505 *it6505) } else { *afe_setting = 0; } - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting); + + ep = of_graph_get_endpoint_by_regs(np, 1, 0); + of_node_put(ep); + + if (ep) { + len = it6505_get_data_lanes_count(ep, 1, 4); + + if (len > 0 && len != 3) { + of_property_read_u32_array(ep, "data-lanes", + data_lanes, len); + *max_lane_count = len; + } else { + *max_lane_count = MAX_LANE_COUNT; + dev_err(dev, "error data-lanes, use default"); + } + } else { + *max_lane_count = MAX_LANE_COUNT; + dev_err(dev, "error endpoint, use default"); + } + + ep = of_graph_get_endpoint_by_regs(np, 0, 0); + of_node_put(ep); + + if (ep) { + len = of_property_read_variable_u64_array(ep, + "link-frequencies", + &link_frequencies, 0, + 1); + if (len >= 0) { + do_div(link_frequencies, 1000); + if (link_frequencies > 297000) { + dev_err(dev, + "max pixel clock error, use default"); + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } else { + *max_dpi_pixel_clock = link_frequencies; + } + } else { + dev_err(dev, "error link frequencies, use default"); + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + } else { + dev_err(dev, "error endpoint, use default"); + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + + DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u", + it6505->afe_setting, it6505->max_lane_count); + DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz", + it6505->max_dpi_pixel_clock); } static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf, -- 2.25.1