From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F7C0C4332F for ; Mon, 28 Nov 2022 17:05:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232475AbiK1RF1 (ORCPT ); Mon, 28 Nov 2022 12:05:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232372AbiK1REb (ORCPT ); Mon, 28 Nov 2022 12:04:31 -0500 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3871BE0BF for ; Mon, 28 Nov 2022 09:04:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1669655062; x=1701191062; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1YbzoiUXSvQWzBUraiDzjfmE9NvY0qFctz1F+7sN7Sw=; b=D5TpavpQX1HiK3giclGNQoZ9U1wd+DsVhKmqRchqSwqCJ9Kdx3SIYN6q G+o7fHvpAEo479sr2YMbvSvNUIJ2kmKEoHcnZMKmG5D7OS84hrgC0NhEj oqKyer4V/Tghg0ewPYwoGmcT/0MrvzzqChiaXnb4ZaMEPTCYDM7jJsXRH wNye7c4P5XFakRPb/6MDlUVF4dAxuI46aVcUgZW6Az3YxKsWAVFhhTV7w 54mm6Te5CPalbuCskK5GU0J+ccBXxAJNSmYjYwL874It7iXZb4NqTHPve awzhZohFuN12nDc8ct+pff3HsRWVJySh4w15dVmtihzMdEfLq+VPAmliY g==; X-IronPort-AV: E=McAfee;i="6500,9779,10545"; a="313591643" X-IronPort-AV: E=Sophos;i="5.96,200,1665471600"; d="scan'208";a="313591643" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2022 09:04:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10545"; a="706864627" X-IronPort-AV: E=Sophos;i="5.96,200,1665471600"; d="scan'208";a="706864627" Received: from unknown (HELO fred..) ([172.25.112.68]) by fmsmga008.fm.intel.com with ESMTP; 28 Nov 2022 09:04:20 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, brgerst@gmail.com, chang.seok.bae@intel.com, jgross@suse.com Subject: [PATCH v5 3/5] x86/gsseg: make asm_load_gs_index() take an u16 Date: Mon, 28 Nov 2022 08:40:26 -0800 Message-Id: <20221128164028.4570-4-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221128164028.4570-1-xin3.li@intel.com> References: <20221128164028.4570-1-xin3.li@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "H. Peter Anvin (Intel)" Let gcc know that only the low 16 bits of load_gs_index() argument actually matter. It might allow it to create slightly better code. However, do not propagate this into the prototypes of functions that end up being paravirtualized, to avoid unnecessary changes. Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/entry/entry_64.S | 2 +- arch/x86/include/asm/special_insns.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 9953d966d124..e0c48998d2fb 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -779,7 +779,7 @@ _ASM_NOKPROBE(common_interrupt_return) /* * Reload gs selector with exception handling - * edi: new selector + * di: new selector * * Is in entry.text as it shouldn't be instrumented. */ diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index 35f709f619fb..a71d0e8d4684 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -120,7 +120,7 @@ static inline void native_wbinvd(void) asm volatile("wbinvd": : :"memory"); } -extern asmlinkage void asm_load_gs_index(unsigned int selector); +extern asmlinkage void asm_load_gs_index(u16 selector); static inline void native_load_gs_index(unsigned int selector) { -- 2.34.1