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[78.150.37.98]) by smtp.gmail.com with ESMTPSA id t123-20020a1c4681000000b003a3170a7af9sm10156808wma.4.2022.12.12.10.07.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 10:07:47 -0800 (PST) From: Sudip Mukherjee To: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski Cc: jude.onyenegecha@sifive.com, ben.dooks@sifive.com, jeegar.lakhani@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Sudip Mukherjee Subject: [PATCH v2 07/15] spi: dw: send cmd and addr to start the spi transfer Date: Mon, 12 Dec 2022 18:07:24 +0000 Message-Id: <20221212180732.79167-8-sudip.mukherjee@sifive.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221212180732.79167-1-sudip.mukherjee@sifive.com> References: <20221212180732.79167-1-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In enhanced spi mode, read or write will start by sending the cmd and address (if present). Signed-off-by: Sudip Mukherjee --- drivers/spi/spi-dw-core.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 06169aa3f37bf..ecab0fbc847c7 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -832,6 +832,29 @@ static void dw_spi_init_enh_mem_buf(struct dw_spi *dws, const struct spi_mem_op } } +static void dw_spi_enh_write_cmd_addr(struct dw_spi *dws, const struct spi_mem_op *op) +{ + void *buf = dws->buf; + u32 txw; + + /* Send cmd as 32 bit value */ + if (buf) { + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + buf += dws->reg_io_width; + if (op->addr.nbytes) { + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + if (op->addr.nbytes > 4) { + /* address more than 32bit */ + buf += dws->reg_io_width; + txw = *(u32 *)(buf); + dw_write_io_reg(dws, DW_SPI_DR, txw); + } + } + } +} + static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { struct spi_controller *ctlr = mem->spi->controller; @@ -886,6 +909,8 @@ static int dw_spi_exec_enh_mem_op(struct spi_mem *mem, const struct spi_mem_op * dw_spi_enable_chip(dws, 1); + dw_spi_enh_write_cmd_addr(dws, op); + return 0; } -- 2.30.2