From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: linux-arm-msm@vger.kernel.org, andersson@kernel.org,
agross@kernel.org, krzysztof.kozlowski@linaro.org
Cc: marijn.suijten@somainline.org,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation
Date: Sat, 31 Dec 2022 13:58:57 +0100 [thread overview]
Message-ID: <20221231125911.437599-5-konrad.dybcio@linaro.org> (raw)
In-Reply-To: <20221231125911.437599-1-konrad.dybcio@linaro.org>
Some properties were not indented consistently. Fix that.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 40 +++++++++++++--------------
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 2026000f3dc7..5452bb85f8e1 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -249,7 +249,7 @@ qusb_phy_0: qusb@79000 {
#phy-cells = <0>;
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
- <&xo>;
+ <&xo>;
clock-names = "cfg_ahb", "ref";
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
@@ -265,11 +265,11 @@ pcie_phy: phy@84000 {
ranges;
clocks = <&gcc GCC_PCIE0_AUX_CLK>,
- <&gcc GCC_PCIE0_AHB_CLK>;
+ <&gcc GCC_PCIE0_AHB_CLK>;
clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
- <&gcc GCC_PCIE0PHY_PHY_BCR>;
+ <&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
@@ -319,8 +319,8 @@ crypto: crypto@73a000 {
compatible = "qcom,crypto-v5.1";
reg = <0x0 0x0073a000 0x0 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
- <&gcc GCC_CRYPTO_AXI_CLK>,
- <&gcc GCC_CRYPTO_CLK>;
+ <&gcc GCC_CRYPTO_AXI_CLK>,
+ <&gcc GCC_CRYPTO_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 2>, <&cryptobam 3>;
dma-names = "rx", "tx";
@@ -425,7 +425,7 @@ blsp1_uart3: serial@78b1000 {
reg = <0x0 0x078b1000 0x0 0x200>;
interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
@@ -438,7 +438,7 @@ blsp1_spi1: spi@78b5000 {
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 12>, <&blsp_dma 13>;
dma-names = "tx", "rx";
@@ -453,7 +453,7 @@ blsp1_spi2: spi@78b6000 {
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
spi-max-frequency = <50000000>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
- <&gcc GCC_BLSP1_AHB_CLK>;
+ <&gcc GCC_BLSP1_AHB_CLK>;
clock-names = "core", "iface";
dmas = <&blsp_dma 14>, <&blsp_dma 15>;
dma-names = "tx", "rx";
@@ -511,8 +511,8 @@ qpic_nand: nand-controller@79b0000 {
clock-names = "core", "aon";
dmas = <&qpic_bam 0>,
- <&qpic_bam 1>,
- <&qpic_bam 2>;
+ <&qpic_bam 1>,
+ <&qpic_bam 2>;
dma-names = "tx", "rx", "cmd";
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
@@ -527,13 +527,13 @@ usb3: usb@8af8800 {
ranges;
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
- <&gcc GCC_USB0_MASTER_CLK>,
- <&gcc GCC_USB0_SLEEP_CLK>,
- <&gcc GCC_USB0_MOCK_UTMI_CLK>;
+ <&gcc GCC_USB0_MASTER_CLK>,
+ <&gcc GCC_USB0_SLEEP_CLK>,
+ <&gcc GCC_USB0_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
- "core",
- "sleep",
- "mock_utmi";
+ "core",
+ "sleep",
+ "mock_utmi";
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
<&gcc GCC_USB0_MASTER_CLK>,
@@ -568,10 +568,10 @@ intc: interrupt-controller@b000000 {
#size-cells = <2>;
interrupt-controller;
#interrupt-cells = <0x3>;
- reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
- <0x0 0x0b002000 0x0 0x1000>, /*GICC*/
- <0x0 0x0b001000 0x0 0x1000>, /*GICH*/
- <0x0 0x0b004000 0x0 0x1000>; /*GICV*/
+ reg = <0x0 0x0b000000 0x0 0x1000>, /*GICD*/
+ <0x0 0x0b002000 0x0 0x1000>, /*GICC*/
+ <0x0 0x0b001000 0x0 0x1000>, /*GICH*/
+ <0x0 0x0b004000 0x0 0x1000>; /*GICV*/
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0 0xb00a000 0 0xffd>;
--
2.39.0
next prev parent reply other threads:[~2022-12-31 12:59 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20221231125911.437599-1-konrad.dybcio@linaro.org>
2022-12-31 12:58 ` [PATCH 01/18] arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits Konrad Dybcio
2022-12-31 19:03 ` Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 02/18] arm64: dts: qcom: ipq6018: Use tabs instead of spaces Konrad Dybcio
2022-12-31 12:58 ` [PATCH 03/18] arm64: dts: qcom: ipq6018: Sort nodes properly Konrad Dybcio
2022-12-31 12:58 ` Konrad Dybcio [this message]
2022-12-31 19:04 ` [PATCH 04/18] arm64: dts: qcom: ipq6018: Fix up some indentation Krzysztof Kozlowski
2022-12-31 12:58 ` [PATCH 05/18] arm64: dts: qcom: ipq6018: Add/remove some newlines Konrad Dybcio
2022-12-31 12:58 ` [PATCH 06/18] arm64: dts: qcom: ipq6018: Use lowercase hex Konrad Dybcio
2022-12-31 12:59 ` [PATCH 07/18] arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits Konrad Dybcio
2022-12-31 12:59 ` [PATCH 08/18] arm64: dts: qcom: sm8150: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 09/18] arm64: dts: qcom: sm6350: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 10/18] arm64: dts: qcom: sdm845: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 11/18] arm64: dts: qcom: sm8250: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 12/18] arm64: dts: qcom: sm8350: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 13/18] arm64: dts: qcom: sc7180: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 14/18] arm64: dts: qcom: sc7280: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 15/18] arm64: dts: qcom: msm8994-octagon: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 16/18] arm64: dts: qcom: sm8450: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 17/18] arm64: dts: qcom: msm8994-kitakami: " Konrad Dybcio
2022-12-31 12:59 ` [PATCH 18/18] arm64: dts: qcom: sm6115: " Konrad Dybcio
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