From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C34FC6379F for ; Mon, 9 Jan 2023 15:40:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229821AbjAIPku (ORCPT ); Mon, 9 Jan 2023 10:40:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237256AbjAIPkQ (ORCPT ); Mon, 9 Jan 2023 10:40:16 -0500 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36F3B40849 for ; Mon, 9 Jan 2023 07:36:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673278574; x=1704814574; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=r8x3W673a81adlsPw3G0WD1BeN7NIeYVAWdht6PQCa8=; b=GAzmxuIv3hvFSwnIKe2NT6QJVHxo9UxvpGZpbyXa/ItjsZVOeMawuzGK 10d6UHwW3aPVgzztmnxJzwoKX5R7C9hlSThBcWU2qz8AFk+2AaFkQ8l/o 6Y6gzKOeKeX1eAlxr9uY/66VeiO6y0npcHAcH4oUAgksE0YTt+I821tuJ sKqiIchzxOgp+OUP21liJXJuexB77FCGfL4ssjnEDzcawyUxDCTHMJD0s RUFMF0sDo72FnnB6V7Zo6LfYAoWPzj0sIm4qFets9dqlm7r+AHgkt8EaW Cg0SauwqrbQ1IyZeZFN6aL4czHN2py11I6yqv6Dwe4MWwMS8knszT+VsA w==; X-IronPort-AV: E=McAfee;i="6500,9779,10585"; a="385203559" X-IronPort-AV: E=Sophos;i="5.96,311,1665471600"; d="scan'208";a="385203559" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jan 2023 07:36:11 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10585"; a="902023878" X-IronPort-AV: E=Sophos;i="5.96,311,1665471600"; d="scan'208";a="902023878" Received: from araj-ucode.jf.intel.com ([10.23.0.19]) by fmsmga006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jan 2023 07:36:11 -0800 From: Ashok Raj To: Borislav Petkov , Thomas Gleixner Cc: X86-kernel , LKML Mailing List , Ashok Raj , Dave Hansen , Tony Luck , Ingo Molnar , alison.schofield@intel.com, reinette.chatre@intel.com, Tom Lendacky Subject: [PATCH v4 1/6] x86/microcode: Add a parameter to microcode_check() to store CPU capabilities Date: Mon, 9 Jan 2023 07:35:50 -0800 Message-Id: <20230109153555.4986-2-ashok.raj@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230109153555.4986-1-ashok.raj@intel.com> References: <20230109153555.4986-1-ashok.raj@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a parameter to store CPU capabilities before performing a microcode update so that the code later can compare CPU capabilities before and after performing the update. Signed-off-by: Ashok Raj Cc: LKML Cc: x86 Cc: Tony Luck Cc: Dave Hansen Cc: Alison Schofield Cc: Reinette Chatre Cc: Thomas Gleixner Cc: Tom Lendacky Cc: Ingo Molnar --- Changes since V3 Boris: - Fix commit log to drop "next patch". - Add documentation to new parameter to microcode_check() --- arch/x86/include/asm/processor.h | 2 +- arch/x86/kernel/cpu/common.c | 21 +++++++++++++-------- arch/x86/kernel/cpu/microcode/core.c | 3 ++- 3 files changed, 16 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 4e35c66edeb7..f256a4ddd25d 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -697,7 +697,7 @@ bool xen_set_default_idle(void); #endif void __noreturn stop_this_cpu(void *dummy); -void microcode_check(void); +void microcode_check(struct cpuinfo_x86 *prev_info); enum l1tf_mitigations { L1TF_MITIGATION_OFF, diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 9cfca3d7d0e2..0f5a173d0871 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -2297,30 +2297,35 @@ void cpu_init_secondary(void) #endif #ifdef CONFIG_MICROCODE_LATE_LOADING -/* +/** + * microcode_check() - Check if any CPU capabilities changed after an update. + * @prev_info: CPU capabilities stored before an update. + * * The microcode loader calls this upon late microcode load to recheck features, * only when microcode has been updated. Caller holds microcode_mutex and CPU * hotplug lock. + * + * Return: None */ -void microcode_check(void) +void microcode_check(struct cpuinfo_x86 *prev_info) { - struct cpuinfo_x86 info; - perf_check_microcode(); /* Reload CPUID max function as it might've changed. */ - info.cpuid_level = cpuid_eax(0); + prev_info->cpuid_level = cpuid_eax(0); /* * Copy all capability leafs to pick up the synthetic ones so that * memcmp() below doesn't fail on that. The ones coming from CPUID will * get overwritten in get_cpu_cap(). */ - memcpy(&info.x86_capability, &boot_cpu_data.x86_capability, sizeof(info.x86_capability)); + memcpy(&prev_info->x86_capability, &boot_cpu_data.x86_capability, + sizeof(prev_info->x86_capability)); - get_cpu_cap(&info); + get_cpu_cap(prev_info); - if (!memcmp(&info.x86_capability, &boot_cpu_data.x86_capability, sizeof(info.x86_capability))) + if (!memcmp(&prev_info->x86_capability, &boot_cpu_data.x86_capability, + sizeof(prev_info->x86_capability))) return; pr_warn("x86/CPU: CPU features have changed after loading microcode, but might not take effect.\n"); diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index c4cd7328177b..e39d83be794b 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -439,6 +439,7 @@ static int __reload_late(void *info) static int microcode_reload_late(void) { int old = boot_cpu_data.microcode, ret; + struct cpuinfo_x86 prev_info; pr_err("Attempting late microcode loading - it is dangerous and taints the kernel.\n"); pr_err("You should switch to early loading, if possible.\n"); @@ -448,7 +449,7 @@ static int microcode_reload_late(void) ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask); if (ret == 0) - microcode_check(); + microcode_check(&prev_info); pr_info("Reload completed, microcode revision: 0x%x -> 0x%x\n", old, boot_cpu_data.microcode); -- 2.34.1