linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v6 0/4] Migrate MT8195 VPPSYS 0/1 to mtk-mmsys driver
@ 2023-01-18  3:15 Moudy Ho
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
                   ` (3 more replies)
  0 siblings, 4 replies; 20+ messages in thread
From: Moudy Ho @ 2023-01-18  3:15 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

Change since v5:
- Rebase on linux-next.
- Correct the compatible enumeration order in "mediatek,mmsys.yaml".

Hi,

This series splits patches from the original mailing list below:
https://patchwork.kernel.org/project/linux-mediatek/list/?series=711592

Refer to the comments of 0/8 and 1/8 in the following series:
https://patchwork.kernel.org/project/linux-mediatek/list/?series=702518
All about the MT8195 VPPSYS 0/1 should be probed from the "mtk-mmsys"
driver, which then starts its own clock driver as the platform driver.

Moudy Ho (3):
  dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys
    driver
  dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  clk: mediatek: remove MT8195 vppsys/0/1 simple_probe

Roy-CW.Yeh (1):
  soc: mediatek: mmsys: add support for MT8195 VPPSYS

 .../bindings/arm/mediatek/mediatek,mmsys.yaml |  2 +
 .../arm/mediatek/mediatek,mt8195-clock.yaml   | 16 -----
 drivers/clk/mediatek/clk-mt8195-vpp0.c        | 58 ++++++++++++++-----
 drivers/clk/mediatek/clk-mt8195-vpp1.c        | 58 ++++++++++++++-----
 drivers/soc/mediatek/mtk-mmsys.c              | 22 +++++++
 drivers/soc/mediatek/mtk-mmsys.h              |  1 +
 6 files changed, 111 insertions(+), 46 deletions(-)

-- 
2.18.0


^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-18  3:15 [PATCH v6 0/4] Migrate MT8195 VPPSYS 0/1 to mtk-mmsys driver Moudy Ho
@ 2023-01-18  3:15 ` Moudy Ho
  2023-01-19 11:14   ` Krzysztof Kozlowski
                     ` (2 more replies)
  2023-01-18  3:15 ` [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
                   ` (2 subsequent siblings)
  3 siblings, 3 replies; 20+ messages in thread
From: Moudy Ho @ 2023-01-18  3:15 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
populate device by platform_device_register_data then start
its own clock driver.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
index 17fcbb45d121..d62d60181147 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
@@ -28,11 +28,9 @@ properties:
           - mediatek,mt8195-imp_iic_wrap_s
           - mediatek,mt8195-imp_iic_wrap_w
           - mediatek,mt8195-mfgcfg
-          - mediatek,mt8195-vppsys0
           - mediatek,mt8195-wpesys
           - mediatek,mt8195-wpesys_vpp0
           - mediatek,mt8195-wpesys_vpp1
-          - mediatek,mt8195-vppsys1
           - mediatek,mt8195-imgsys
           - mediatek,mt8195-imgsys1_dip_top
           - mediatek,mt8195-imgsys1_dip_nr
@@ -92,13 +90,6 @@ examples:
         #clock-cells = <1>;
     };
 
-  - |
-    vppsys0: clock-controller@14000000 {
-        compatible = "mediatek,mt8195-vppsys0";
-        reg = <0x14000000 0x1000>;
-        #clock-cells = <1>;
-    };
-
   - |
     wpesys: clock-controller@14e00000 {
         compatible = "mediatek,mt8195-wpesys";
@@ -120,13 +111,6 @@ examples:
         #clock-cells = <1>;
     };
 
-  - |
-    vppsys1: clock-controller@14f00000 {
-        compatible = "mediatek,mt8195-vppsys1";
-        reg = <0x14f00000 0x1000>;
-        #clock-cells = <1>;
-    };
-
   - |
     imgsys: clock-controller@15000000 {
         compatible = "mediatek,mt8195-imgsys";
-- 
2.18.0


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  2023-01-18  3:15 [PATCH v6 0/4] Migrate MT8195 VPPSYS 0/1 to mtk-mmsys driver Moudy Ho
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
@ 2023-01-18  3:15 ` Moudy Ho
  2023-01-18 15:59   ` Rob Herring
  2023-01-30 11:27   ` Matthias Brugger
  2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
       [not found] ` <20230118031509.29834-5-moudy.ho@mediatek.com>
  3 siblings, 2 replies; 20+ messages in thread
From: Moudy Ho @ 2023-01-18  3:15 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
hardware differences in power domains, clocks and subsystem counts,
which should be determined by compatible names.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index 84de12709323..b08ae7405b1a 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -33,6 +33,8 @@ properties:
               - mediatek,mt8186-mmsys
               - mediatek,mt8188-vdosys0
               - mediatek,mt8192-mmsys
+              - mediatek,mt8195-vppsys0
+              - mediatek,mt8195-vppsys1
               - mediatek,mt8365-mmsys
           - const: syscon
 
-- 
2.18.0


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-18  3:15 [PATCH v6 0/4] Migrate MT8195 VPPSYS 0/1 to mtk-mmsys driver Moudy Ho
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
  2023-01-18  3:15 ` [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
@ 2023-01-18  3:15 ` Moudy Ho
  2023-01-19 15:50   ` Matthias Brugger
                     ` (3 more replies)
       [not found] ` <20230118031509.29834-5-moudy.ho@mediatek.com>
  3 siblings, 4 replies; 20+ messages in thread
From: Moudy Ho @ 2023-01-18  3:15 UTC (permalink / raw)
  To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

MT8195 VPPSYS0/1 will be probed by the compatible name in
the mtk-mmsys driver and then probe its own clock driver as
a platform driver.

Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
---
 drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
 drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
 2 files changed, 86 insertions(+), 30 deletions(-)

diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
index bf2939c3a023..6d5800f69f6c 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
@@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
 	GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
 };
 
-static const struct mtk_clk_desc vpp0_desc = {
-	.clks = vpp0_clks,
-	.num_clks = ARRAY_SIZE(vpp0_clks),
-};
+static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
+	struct clk_onecell_data *clk_data;
+	int r;
 
-static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
-	{
-		.compatible = "mediatek,mt8195-vppsys0",
-		.data = &vpp0_desc,
-	}, {
-		/* sentinel */
-	}
-};
+	clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
+	if (!clk_data)
+		return -ENOMEM;
+
+	r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+	if (r)
+		goto free_vpp0_data;
+
+	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+	if (r)
+		goto unregister_gates;
+
+	platform_set_drvdata(pdev, clk_data);
+
+	return r;
+
+unregister_gates:
+	mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+free_vpp0_data:
+	mtk_free_clk_data(clk_data);
+	return r;
+}
+
+static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
+	struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+	of_clk_del_provider(node);
+	mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
+	mtk_free_clk_data(clk_data);
+
+	return 0;
+}
 
 static struct platform_driver clk_mt8195_vpp0_drv = {
-	.probe = mtk_clk_simple_probe,
-	.remove = mtk_clk_simple_remove,
+	.probe = clk_mt8195_vpp0_probe,
+	.remove = clk_mt8195_vpp0_remove,
 	.driver = {
 		.name = "clk-mt8195-vpp0",
-		.of_match_table = of_match_clk_mt8195_vpp0,
 	},
 };
 builtin_platform_driver(clk_mt8195_vpp0_drv);
diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
index ffd52c762890..3b88c69e96c9 100644
--- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
+++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
@@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
 	GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
 };
 
-static const struct mtk_clk_desc vpp1_desc = {
-	.clks = vpp1_clks,
-	.num_clks = ARRAY_SIZE(vpp1_clks),
-};
+static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
+	struct clk_onecell_data *clk_data;
+	int r;
 
-static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
-	{
-		.compatible = "mediatek,mt8195-vppsys1",
-		.data = &vpp1_desc,
-	}, {
-		/* sentinel */
-	}
-};
+	clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
+	if (!clk_data)
+		return -ENOMEM;
+
+	r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+	if (r)
+		goto free_vpp1_data;
+
+	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+	if (r)
+		goto unregister_gates;
+
+	platform_set_drvdata(pdev, clk_data);
+
+	return r;
+
+unregister_gates:
+	mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+free_vpp1_data:
+	mtk_free_clk_data(clk_data);
+	return r;
+}
+
+static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *node = dev->parent->of_node;
+	struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
+
+	of_clk_del_provider(node);
+	mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
+	mtk_free_clk_data(clk_data);
+
+	return 0;
+}
 
 static struct platform_driver clk_mt8195_vpp1_drv = {
-	.probe = mtk_clk_simple_probe,
-	.remove = mtk_clk_simple_remove,
+	.probe = clk_mt8195_vpp1_probe,
+	.remove = clk_mt8195_vpp1_remove,
 	.driver = {
 		.name = "clk-mt8195-vpp1",
-		.of_match_table = of_match_clk_mt8195_vpp1,
 	},
 };
 builtin_platform_driver(clk_mt8195_vpp1_drv);
-- 
2.18.0


^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  2023-01-18  3:15 ` [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
@ 2023-01-18 15:59   ` Rob Herring
  2023-01-30 11:27   ` Matthias Brugger
  1 sibling, 0 replies; 20+ messages in thread
From: Rob Herring @ 2023-01-18 15:59 UTC (permalink / raw)
  To: Moudy Ho
  Cc: Rob Herring, Matthias Brugger, Stephen Boyd, devicetree,
	linux-kernel, linux-mediatek, Michael Turquette,
	Project_Global_Chrome_Upstream_Group, Krzysztof Kozlowski,
	linux-arm-kernel, linux-clk


On Wed, 18 Jan 2023 11:15:07 +0800, Moudy Ho wrote:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
>  .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        | 2 ++
>  1 file changed, 2 insertions(+)
> 


Please add Acked-by/Reviewed-by tags when posting new versions. However,
there's no need to repost patches *only* to add the tags. The upstream
maintainer will do that for acks received on the version they apply.

If a tag was not added on purpose, please state why and what changed.

Missing tags:

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>



^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
@ 2023-01-19 11:14   ` Krzysztof Kozlowski
  2023-01-19 16:08   ` Matthias Brugger
  2023-01-27 23:20   ` Stephen Boyd
  2 siblings, 0 replies; 20+ messages in thread
From: Krzysztof Kozlowski @ 2023-01-19 11:14 UTC (permalink / raw)
  To: Moudy Ho, Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group

On 18/01/2023 04:15, Moudy Ho wrote:
> MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
> populate device by platform_device_register_data then start
> its own clock driver.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
>  .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ----------------
>  1 file changed, 16 deletions(-)


Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof


^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
@ 2023-01-19 15:50   ` Matthias Brugger
  2023-01-27 23:20   ` Stephen Boyd
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 20+ messages in thread
From: Matthias Brugger @ 2023-01-19 15:50 UTC (permalink / raw)
  To: Moudy Ho, Rob Herring, Krzysztof Kozlowski, Michael Turquette,
	Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group



On 18/01/2023 04:15, Moudy Ho wrote:
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

> ---
>   drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
>   drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
>   2 files changed, 86 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
>   	GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
>   };
>   
> -static const struct mtk_clk_desc vpp0_desc = {
> -	.clks = vpp0_clks,
> -	.num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *node = dev->parent->of_node;
> +	struct clk_onecell_data *clk_data;
> +	int r;
>   
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> -	{
> -		.compatible = "mediatek,mt8195-vppsys0",
> -		.data = &vpp0_desc,
> -	}, {
> -		/* sentinel */
> -	}
> -};
> +	clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> +	if (!clk_data)
> +		return -ENOMEM;
> +
> +	r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +	if (r)
> +		goto free_vpp0_data;
> +
> +	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> +	if (r)
> +		goto unregister_gates;
> +
> +	platform_set_drvdata(pdev, clk_data);
> +
> +	return r;
> +
> +unregister_gates:
> +	mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +free_vpp0_data:
> +	mtk_free_clk_data(clk_data);
> +	return r;
> +}
> +
> +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *node = dev->parent->of_node;
> +	struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> +	of_clk_del_provider(node);
> +	mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +	mtk_free_clk_data(clk_data);
> +
> +	return 0;
> +}
>   
>   static struct platform_driver clk_mt8195_vpp0_drv = {
> -	.probe = mtk_clk_simple_probe,
> -	.remove = mtk_clk_simple_remove,
> +	.probe = clk_mt8195_vpp0_probe,
> +	.remove = clk_mt8195_vpp0_remove,
>   	.driver = {
>   		.name = "clk-mt8195-vpp0",
> -		.of_match_table = of_match_clk_mt8195_vpp0,
>   	},
>   };
>   builtin_platform_driver(clk_mt8195_vpp0_drv);
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> index ffd52c762890..3b88c69e96c9 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
>   	GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
>   };
>   
> -static const struct mtk_clk_desc vpp1_desc = {
> -	.clks = vpp1_clks,
> -	.num_clks = ARRAY_SIZE(vpp1_clks),
> -};
> +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *node = dev->parent->of_node;
> +	struct clk_onecell_data *clk_data;
> +	int r;
>   
> -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> -	{
> -		.compatible = "mediatek,mt8195-vppsys1",
> -		.data = &vpp1_desc,
> -	}, {
> -		/* sentinel */
> -	}
> -};
> +	clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> +	if (!clk_data)
> +		return -ENOMEM;
> +
> +	r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +	if (r)
> +		goto free_vpp1_data;
> +
> +	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> +	if (r)
> +		goto unregister_gates;
> +
> +	platform_set_drvdata(pdev, clk_data);
> +
> +	return r;
> +
> +unregister_gates:
> +	mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +free_vpp1_data:
> +	mtk_free_clk_data(clk_data);
> +	return r;
> +}
> +
> +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *node = dev->parent->of_node;
> +	struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> +	of_clk_del_provider(node);
> +	mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +	mtk_free_clk_data(clk_data);
> +
> +	return 0;
> +}
>   
>   static struct platform_driver clk_mt8195_vpp1_drv = {
> -	.probe = mtk_clk_simple_probe,
> -	.remove = mtk_clk_simple_remove,
> +	.probe = clk_mt8195_vpp1_probe,
> +	.remove = clk_mt8195_vpp1_remove,
>   	.driver = {
>   		.name = "clk-mt8195-vpp1",
> -		.of_match_table = of_match_clk_mt8195_vpp1,
>   	},
>   };
>   builtin_platform_driver(clk_mt8195_vpp1_drv);

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
  2023-01-19 11:14   ` Krzysztof Kozlowski
@ 2023-01-19 16:08   ` Matthias Brugger
  2023-01-26  2:05     ` Stephen Boyd
  2023-01-27 23:20   ` Stephen Boyd
  2 siblings, 1 reply; 20+ messages in thread
From: Matthias Brugger @ 2023-01-19 16:08 UTC (permalink / raw)
  To: Moudy Ho, Rob Herring, Krzysztof Kozlowski, Michael Turquette,
	Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group



On 18/01/2023 04:15, Moudy Ho wrote:
> MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
> populate device by platform_device_register_data then start
> its own clock driver.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>

Stephen, if you want I can take 1/4 and 3/4 through my tree. 3/4 shouldn't be a 
problem, not sure about this patch. In any case if you want me to do so, I'd 
need a Acked-by from you.

Regards,
Matthias

> ---
>   .../arm/mediatek/mediatek,mt8195-clock.yaml      | 16 ----------------
>   1 file changed, 16 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> index 17fcbb45d121..d62d60181147 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8195-clock.yaml
> @@ -28,11 +28,9 @@ properties:
>             - mediatek,mt8195-imp_iic_wrap_s
>             - mediatek,mt8195-imp_iic_wrap_w
>             - mediatek,mt8195-mfgcfg
> -          - mediatek,mt8195-vppsys0
>             - mediatek,mt8195-wpesys
>             - mediatek,mt8195-wpesys_vpp0
>             - mediatek,mt8195-wpesys_vpp1
> -          - mediatek,mt8195-vppsys1
>             - mediatek,mt8195-imgsys
>             - mediatek,mt8195-imgsys1_dip_top
>             - mediatek,mt8195-imgsys1_dip_nr
> @@ -92,13 +90,6 @@ examples:
>           #clock-cells = <1>;
>       };
>   
> -  - |
> -    vppsys0: clock-controller@14000000 {
> -        compatible = "mediatek,mt8195-vppsys0";
> -        reg = <0x14000000 0x1000>;
> -        #clock-cells = <1>;
> -    };
> -
>     - |
>       wpesys: clock-controller@14e00000 {
>           compatible = "mediatek,mt8195-wpesys";
> @@ -120,13 +111,6 @@ examples:
>           #clock-cells = <1>;
>       };
>   
> -  - |
> -    vppsys1: clock-controller@14f00000 {
> -        compatible = "mediatek,mt8195-vppsys1";
> -        reg = <0x14f00000 0x1000>;
> -        #clock-cells = <1>;
> -    };
> -
>     - |
>       imgsys: clock-controller@15000000 {
>           compatible = "mediatek,mt8195-imgsys";

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-19 16:08   ` Matthias Brugger
@ 2023-01-26  2:05     ` Stephen Boyd
  2023-01-26 14:32       ` Matthias Brugger
  0 siblings, 1 reply; 20+ messages in thread
From: Stephen Boyd @ 2023-01-26  2:05 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Matthias Brugger, Michael Turquette,
	Moudy Ho, Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group

Quoting Matthias Brugger (2023-01-19 08:08:48)
> 
> 
> On 18/01/2023 04:15, Moudy Ho wrote:
> > MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
> > populate device by platform_device_register_data then start
> > its own clock driver.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> 
> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
> 
> Stephen, if you want I can take 1/4 and 3/4 through my tree. 3/4 shouldn't be a 
> problem, not sure about this patch. In any case if you want me to do so, I'd 
> need a Acked-by from you.

Do you need to take them? I'm picking up mediatek patches currently so I
can probably just take 1 and 3 if there isn't any build dependency.

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-26  2:05     ` Stephen Boyd
@ 2023-01-26 14:32       ` Matthias Brugger
  2023-01-26 14:33         ` Matthias Brugger
  0 siblings, 1 reply; 20+ messages in thread
From: Matthias Brugger @ 2023-01-26 14:32 UTC (permalink / raw)
  To: Stephen Boyd, Krzysztof Kozlowski, Michael Turquette, Moudy Ho,
	Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group



On 26/01/2023 03:05, Stephen Boyd wrote:
> Quoting Matthias Brugger (2023-01-19 08:08:48)
>>
>>
>> On 18/01/2023 04:15, Moudy Ho wrote:
>>> MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
>>> populate device by platform_device_register_data then start
>>> its own clock driver.
>>>
>>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>>
>> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
>>
>> Stephen, if you want I can take 1/4 and 3/4 through my tree. 3/4 shouldn't be a
>> problem, not sure about this patch. In any case if you want me to do so, I'd
>> need a Acked-by from you.
> 
> Do you need to take them? I'm picking up mediatek patches currently so I
> can probably just take 1 and 3 if there isn't any build dependency.

No I don't need to, no build depencies. Ok, I'll take 1 and 3 then.

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-26 14:32       ` Matthias Brugger
@ 2023-01-26 14:33         ` Matthias Brugger
  0 siblings, 0 replies; 20+ messages in thread
From: Matthias Brugger @ 2023-01-26 14:33 UTC (permalink / raw)
  To: Stephen Boyd, Krzysztof Kozlowski, Michael Turquette, Moudy Ho,
	Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group



On 26/01/2023 15:32, Matthias Brugger wrote:
> 
> 
> On 26/01/2023 03:05, Stephen Boyd wrote:
>> Quoting Matthias Brugger (2023-01-19 08:08:48)
>>>
>>>
>>> On 18/01/2023 04:15, Moudy Ho wrote:
>>>> MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
>>>> populate device by platform_device_register_data then start
>>>> its own clock driver.
>>>>
>>>> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
>>>
>>> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
>>>
>>> Stephen, if you want I can take 1/4 and 3/4 through my tree. 3/4 shouldn't be a
>>> problem, not sure about this patch. In any case if you want me to do so, I'd
>>> need a Acked-by from you.
>>
>> Do you need to take them? I'm picking up mediatek patches currently so I
>> can probably just take 1 and 3 if there isn't any build dependency.
> 
> No I don't need to, no build depencies. Ok, I'll take 1 and 3 then.

Argh, 2 and 4 of course. 1 and 3 will go through your tree. Sorry for the confusion.

Matthias

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
  2023-01-19 15:50   ` Matthias Brugger
@ 2023-01-27 23:20   ` Stephen Boyd
  2023-01-30 19:36   ` Stephen Boyd
  2023-01-31  9:50   ` Chen-Yu Tsai
  3 siblings, 0 replies; 20+ messages in thread
From: Stephen Boyd @ 2023-01-27 23:20 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Matthias Brugger, Michael Turquette,
	Moudy Ho, Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

Quoting Moudy Ho (2023-01-17 19:15:08)
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---

Applied to clk-next

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 to mtk-mmsys driver
  2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
  2023-01-19 11:14   ` Krzysztof Kozlowski
  2023-01-19 16:08   ` Matthias Brugger
@ 2023-01-27 23:20   ` Stephen Boyd
  2 siblings, 0 replies; 20+ messages in thread
From: Stephen Boyd @ 2023-01-27 23:20 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Matthias Brugger, Michael Turquette,
	Moudy Ho, Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho

Quoting Moudy Ho (2023-01-17 19:15:06)
> MT8195 VPPSYS 0/1 should be probed from mtk-mmsys driver to
> populate device by platform_device_register_data then start
> its own clock driver.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---

Applied to clk-next

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS
  2023-01-18  3:15 ` [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
  2023-01-18 15:59   ` Rob Herring
@ 2023-01-30 11:27   ` Matthias Brugger
  1 sibling, 0 replies; 20+ messages in thread
From: Matthias Brugger @ 2023-01-30 11:27 UTC (permalink / raw)
  To: Moudy Ho, Rob Herring, Krzysztof Kozlowski, Michael Turquette,
	Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group



On 18/01/2023 04:15, Moudy Ho wrote:
> For MT8195, VPPSYS0 and VPPSYS1 are 2 display pipes with
> hardware differences in power domains, clocks and subsystem counts,
> which should be determined by compatible names.
> 
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>

Applied, thanks!

> ---
>   .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml        | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> index 84de12709323..b08ae7405b1a 100644
> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> @@ -33,6 +33,8 @@ properties:
>                 - mediatek,mt8186-mmsys
>                 - mediatek,mt8188-vdosys0
>                 - mediatek,mt8192-mmsys
> +              - mediatek,mt8195-vppsys0
> +              - mediatek,mt8195-vppsys1
>                 - mediatek,mt8365-mmsys
>             - const: syscon
>   

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 4/4] soc: mediatek: mmsys: add support for MT8195 VPPSYS
       [not found] ` <20230118031509.29834-5-moudy.ho@mediatek.com>
@ 2023-01-30 11:28   ` Matthias Brugger
  0 siblings, 0 replies; 20+ messages in thread
From: Matthias Brugger @ 2023-01-30 11:28 UTC (permalink / raw)
  To: Moudy Ho, Rob Herring, Krzysztof Kozlowski, Michael Turquette,
	Stephen Boyd
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Roy-CW.Yeh



On 18/01/2023 04:15, Moudy Ho wrote:
> From: "Roy-CW.Yeh" <roy-cw.yeh@mediatek.com>
> 
> Add MT8195 VPPSYS0 and VPPSYS1 driver data.
> 
> Signed-off-by: Roy-CW.Yeh <roy-cw.yeh@mediatek.com>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Applied, thanks

> ---
>   drivers/soc/mediatek/mtk-mmsys.c | 22 ++++++++++++++++++++++
>   drivers/soc/mediatek/mtk-mmsys.h |  1 +
>   2 files changed, 23 insertions(+)
> 
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index 38f1dd92e7c6..176fdc866e22 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -88,6 +88,16 @@ static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
>   	.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
>   };
>   
> +static const struct mtk_mmsys_driver_data mt8195_vppsys0_driver_data = {
> +	.clk_driver = "clk-mt8195-vpp0",
> +	.is_vppsys = true,
> +};
> +
> +static const struct mtk_mmsys_driver_data mt8195_vppsys1_driver_data = {
> +	.clk_driver = "clk-mt8195-vpp1",
> +	.is_vppsys = true,
> +};
> +
>   static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
>   	.clk_driver = "clk-mt8365-mm",
>   	.routes = mt8365_mmsys_routing_table,
> @@ -264,6 +274,9 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>   	if (IS_ERR(clks))
>   		return PTR_ERR(clks);
>   
> +	if (mmsys->data->is_vppsys)
> +		goto out_probe_done;
> +
>   	drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
>   					    PLATFORM_DEVID_AUTO, NULL, 0);
>   	if (IS_ERR(drm)) {
> @@ -271,6 +284,7 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>   		return PTR_ERR(drm);
>   	}
>   
> +out_probe_done:
>   	return 0;
>   }
>   
> @@ -323,6 +337,14 @@ static const struct of_device_id of_match_mtk_mmsys[] = {
>   		.compatible = "mediatek,mt8195-vdosys0",
>   		.data = &mt8195_vdosys0_driver_data,
>   	},
> +	{
> +		.compatible = "mediatek,mt8195-vppsys0",
> +		.data = &mt8195_vppsys0_driver_data,
> +	},
> +	{
> +		.compatible = "mediatek,mt8195-vppsys1",
> +		.data = &mt8195_vppsys1_driver_data,
> +	},
>   	{
>   		.compatible = "mediatek,mt8365-mmsys",
>   		.data = &mt8365_mmsys_driver_data,
> diff --git a/drivers/soc/mediatek/mtk-mmsys.h b/drivers/soc/mediatek/mtk-mmsys.h
> index 77f37f8c715b..54a96b83afb4 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.h
> +++ b/drivers/soc/mediatek/mtk-mmsys.h
> @@ -91,6 +91,7 @@ struct mtk_mmsys_driver_data {
>   	const struct mtk_mmsys_routes *routes;
>   	const unsigned int num_routes;
>   	const u16 sw0_rst_offset;
> +	const bool is_vppsys;
>   };
>   
>   /*

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
  2023-01-19 15:50   ` Matthias Brugger
  2023-01-27 23:20   ` Stephen Boyd
@ 2023-01-30 19:36   ` Stephen Boyd
  2023-01-31  1:57     ` Moudy Ho (何宗原)
  2023-01-31  8:33     ` AngeloGioacchino Del Regno
  2023-01-31  9:50   ` Chen-Yu Tsai
  3 siblings, 2 replies; 20+ messages in thread
From: Stephen Boyd @ 2023-01-30 19:36 UTC (permalink / raw)
  To: Krzysztof Kozlowski, Matthias Brugger, Michael Turquette,
	Moudy Ho, Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group, Moudy Ho,
	AngeloGioacchino Del Regno

Quoting Moudy Ho (2023-01-17 19:15:08)
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
>         GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
>  };
>  
> -static const struct mtk_clk_desc vpp0_desc = {
> -       .clks = vpp0_clks,
> -       .num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
> +       struct clk_onecell_data *clk_data;
> +       int r;
>  
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> -       {
> -               .compatible = "mediatek,mt8195-vppsys0",
> -               .data = &vpp0_desc,
> -       }, {
> -               /* sentinel */
> -       }
> -};
> +       clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> +       if (!clk_data)
> +               return -ENOMEM;
> +
> +       r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);

This API is wrecked by a patch from AngeloGioacchino. Can you resend, or
tell me which device should be used here?

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-30 19:36   ` Stephen Boyd
@ 2023-01-31  1:57     ` Moudy Ho (何宗原)
  2023-01-31  8:33     ` AngeloGioacchino Del Regno
  1 sibling, 0 replies; 20+ messages in thread
From: Moudy Ho (何宗原) @ 2023-01-31  1:57 UTC (permalink / raw)
  To: matthias.bgg, sboyd, mturquette, robh+dt, krzysztof.kozlowski+dt
  Cc: linux-arm-kernel, linux-kernel, linux-mediatek,
	Project_Global_Chrome_Upstream_Group, angelogioacchino.delregno,
	devicetree, linux-clk

On Mon, 2023-01-30 at 11:36 -0800, Stephen Boyd wrote:
> Quoting Moudy Ho (2023-01-17 19:15:08)
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > index bf2939c3a023..6d5800f69f6c 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> >         GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC,
> > "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> >  };
> >  
> > -static const struct mtk_clk_desc vpp0_desc = {
> > -       .clks = vpp0_clks,
> > -       .num_clks = ARRAY_SIZE(vpp0_clks),
> > -};
> > +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *node = dev->parent->of_node;
> > +       struct clk_onecell_data *clk_data;
> > +       int r;
> >  
> > -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> > -       {
> > -               .compatible = "mediatek,mt8195-vppsys0",
> > -               .data = &vpp0_desc,
> > -       }, {
> > -               /* sentinel */
> > -       }
> > -};
> > +       clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> > +       if (!clk_data)
> > +               return -ENOMEM;
> > +
> > +       r = mtk_clk_register_gates(node, vpp0_clks,
> > ARRAY_SIZE(vpp0_clks), clk_data);
> 
> This API is wrecked by a patch from AngeloGioacchino. Can you resend,
> or
> tell me which device should be used here?

Hi Stephen,

Thanks for your time and hlep.
Refer to 
https://lore.kernel.org/lkml/20230120092053.182923-4-angelogioacchino.delregno@collabora.com/
, both clk-mt8195-vpp0/1 need to add "&pdev->dev" to the 1st param. in
the API to match the modification.

Regards,
Moudy

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-30 19:36   ` Stephen Boyd
  2023-01-31  1:57     ` Moudy Ho (何宗原)
@ 2023-01-31  8:33     ` AngeloGioacchino Del Regno
  1 sibling, 0 replies; 20+ messages in thread
From: AngeloGioacchino Del Regno @ 2023-01-31  8:33 UTC (permalink / raw)
  To: Stephen Boyd, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Moudy Ho, Rob Herring
  Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
	linux-clk, Project_Global_Chrome_Upstream_Group

Il 30/01/23 20:36, Stephen Boyd ha scritto:
> Quoting Moudy Ho (2023-01-17 19:15:08)
>> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> index bf2939c3a023..6d5800f69f6c 100644
>> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
>> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
>>          GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
>>   };
>>   
>> -static const struct mtk_clk_desc vpp0_desc = {
>> -       .clks = vpp0_clks,
>> -       .num_clks = ARRAY_SIZE(vpp0_clks),
>> -};
>> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
>> +{
>> +       struct device *dev = &pdev->dev;
>> +       struct device_node *node = dev->parent->of_node;
>> +       struct clk_onecell_data *clk_data;
>> +       int r;
>>   
>> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
>> -       {
>> -               .compatible = "mediatek,mt8195-vppsys0",
>> -               .data = &vpp0_desc,
>> -       }, {
>> -               /* sentinel */
>> -       }
>> -};
>> +       clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
>> +       if (!clk_data)
>> +               return -ENOMEM;
>> +
>> +       r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> 
> This API is wrecked by a patch from AngeloGioacchino. Can you resend, or
> tell me which device should be used here?

mtk_clk_register_gates(&pdev->dev, node, vpp0_clks, ......);


...with that change, for this patch:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

P.S.: Next cleanup round will introduce mtk_clk_pdev_simple_probe()

Cheers,
Angelo

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
                     ` (2 preceding siblings ...)
  2023-01-30 19:36   ` Stephen Boyd
@ 2023-01-31  9:50   ` Chen-Yu Tsai
  2023-02-07  1:58     ` Moudy Ho (何宗原)
  3 siblings, 1 reply; 20+ messages in thread
From: Chen-Yu Tsai @ 2023-01-31  9:50 UTC (permalink / raw)
  To: Moudy Ho
  Cc: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
	Michael Turquette, Stephen Boyd, devicetree, linux-kernel,
	linux-arm-kernel, linux-mediatek, linux-clk,
	Project_Global_Chrome_Upstream_Group

On Wed, Jan 18, 2023 at 11:16 AM Moudy Ho <moudy.ho@mediatek.com> wrote:
>
> MT8195 VPPSYS0/1 will be probed by the compatible name in
> the mtk-mmsys driver and then probe its own clock driver as
> a platform driver.
>
> Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> ---
>  drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++-------
>  drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++-------
>  2 files changed, 86 insertions(+), 30 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> index bf2939c3a023..6d5800f69f6c 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
>         GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC, "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
>  };
>
> -static const struct mtk_clk_desc vpp0_desc = {
> -       .clks = vpp0_clks,
> -       .num_clks = ARRAY_SIZE(vpp0_clks),
> -};
> +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
> +       struct clk_onecell_data *clk_data;

mtk_alloc_clk_data() API changed a couple releases back. So:

          struct clk_hw_onecell_data

> +       int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> -       {
> -               .compatible = "mediatek,mt8195-vppsys0",
> -               .data = &vpp0_desc,
> -       }, {
> -               /* sentinel */
> -       }
> -};
> +       clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> +       if (!clk_data)
> +               return -ENOMEM;
> +
> +       r = mtk_clk_register_gates(node, vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);

API changed.

> +       if (r)
> +               goto free_vpp0_data;
> +
> +       r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);

              of_clk_add_provider(node, of_clk_hw_onecell_get, clk_data);

Same for the other driver.


ChenYu

> +       if (r)
> +               goto unregister_gates;
> +
> +       platform_set_drvdata(pdev, clk_data);
> +
> +       return r;
> +
> +unregister_gates:
> +       mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +free_vpp0_data:
> +       mtk_free_clk_data(clk_data);
> +       return r;
> +}
> +
> +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
> +       struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> +       of_clk_del_provider(node);
> +       mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks), clk_data);
> +       mtk_free_clk_data(clk_data);
> +
> +       return 0;
> +}
>
>  static struct platform_driver clk_mt8195_vpp0_drv = {
> -       .probe = mtk_clk_simple_probe,
> -       .remove = mtk_clk_simple_remove,
> +       .probe = clk_mt8195_vpp0_probe,
> +       .remove = clk_mt8195_vpp0_remove,
>         .driver = {
>                 .name = "clk-mt8195-vpp0",
> -               .of_match_table = of_match_clk_mt8195_vpp0,
>         },
>  };
>  builtin_platform_driver(clk_mt8195_vpp0_drv);
> diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> index ffd52c762890..3b88c69e96c9 100644
> --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
>         GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m", "clk26m", 26),
>  };
>
> -static const struct mtk_clk_desc vpp1_desc = {
> -       .clks = vpp1_clks,
> -       .num_clks = ARRAY_SIZE(vpp1_clks),
> -};
> +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
> +       struct clk_onecell_data *clk_data;
> +       int r;
>
> -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> -       {
> -               .compatible = "mediatek,mt8195-vppsys1",
> -               .data = &vpp1_desc,
> -       }, {
> -               /* sentinel */
> -       }
> -};
> +       clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> +       if (!clk_data)
> +               return -ENOMEM;
> +
> +       r = mtk_clk_register_gates(node, vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +       if (r)
> +               goto free_vpp1_data;
> +
> +       r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
> +       if (r)
> +               goto unregister_gates;
> +
> +       platform_set_drvdata(pdev, clk_data);
> +
> +       return r;
> +
> +unregister_gates:
> +       mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +free_vpp1_data:
> +       mtk_free_clk_data(clk_data);
> +       return r;
> +}
> +
> +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> +{
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
> +       struct clk_hw_onecell_data *clk_data = platform_get_drvdata(pdev);
> +
> +       of_clk_del_provider(node);
> +       mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks), clk_data);
> +       mtk_free_clk_data(clk_data);
> +
> +       return 0;
> +}
>
>  static struct platform_driver clk_mt8195_vpp1_drv = {
> -       .probe = mtk_clk_simple_probe,
> -       .remove = mtk_clk_simple_remove,
> +       .probe = clk_mt8195_vpp1_probe,
> +       .remove = clk_mt8195_vpp1_remove,
>         .driver = {
>                 .name = "clk-mt8195-vpp1",
> -               .of_match_table = of_match_clk_mt8195_vpp1,
>         },
>  };
>  builtin_platform_driver(clk_mt8195_vpp1_drv);
> --
> 2.18.0
>

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe
  2023-01-31  9:50   ` Chen-Yu Tsai
@ 2023-02-07  1:58     ` Moudy Ho (何宗原)
  0 siblings, 0 replies; 20+ messages in thread
From: Moudy Ho (何宗原) @ 2023-02-07  1:58 UTC (permalink / raw)
  To: wenst
  Cc: linux-kernel, robh+dt, mturquette, devicetree, sboyd,
	linux-mediatek, Project_Global_Chrome_Upstream_Group,
	linux-arm-kernel, krzysztof.kozlowski+dt, matthias.bgg,
	linux-clk

On Tue, 2023-01-31 at 17:50 +0800, Chen-Yu Tsai wrote:
> On Wed, Jan 18, 2023 at 11:16 AM Moudy Ho <moudy.ho@mediatek.com>
> wrote:
> > 
> > MT8195 VPPSYS0/1 will be probed by the compatible name in
> > the mtk-mmsys driver and then probe its own clock driver as
> > a platform driver.
> > 
> > Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
> > ---
> >  drivers/clk/mediatek/clk-mt8195-vpp0.c | 58 +++++++++++++++++++---
> > ----
> >  drivers/clk/mediatek/clk-mt8195-vpp1.c | 58 +++++++++++++++++++---
> > ----
> >  2 files changed, 86 insertions(+), 30 deletions(-)
> > 
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > index bf2939c3a023..6d5800f69f6c 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp0.c
> > @@ -86,26 +86,54 @@ static const struct mtk_gate vpp0_clks[] = {
> >         GATE_VPP0_2(CLK_VPP0_WARP1_MDP_DL_ASYNC,
> > "vpp0_warp1_mdp_dl_async", "top_wpe_vpp", 3),
> >  };
> > 
> > -static const struct mtk_clk_desc vpp0_desc = {
> > -       .clks = vpp0_clks,
> > -       .num_clks = ARRAY_SIZE(vpp0_clks),
> > -};
> > +static int clk_mt8195_vpp0_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *node = dev->parent->of_node;
> > +       struct clk_onecell_data *clk_data;
> 
> mtk_alloc_clk_data() API changed a couple releases back. So:
> 
>           struct clk_hw_onecell_data
> 
> > +       int r;
> > 
> > -static const struct of_device_id of_match_clk_mt8195_vpp0[] = {
> > -       {
> > -               .compatible = "mediatek,mt8195-vppsys0",
> > -               .data = &vpp0_desc,
> > -       }, {
> > -               /* sentinel */
> > -       }
> > -};
> > +       clk_data = mtk_alloc_clk_data(CLK_VPP0_NR_CLK);
> > +       if (!clk_data)
> > +               return -ENOMEM;
> > +
> > +       r = mtk_clk_register_gates(node, vpp0_clks,
> > ARRAY_SIZE(vpp0_clks), clk_data);
> 
> API changed.
> 
> > +       if (r)
> > +               goto free_vpp0_data;
> > +
> > +       r = of_clk_add_provider(node, of_clk_src_onecell_get,
> > clk_data);
> 
>               of_clk_add_provider(node, of_clk_hw_onecell_get,
> clk_data);
> 
> Same for the other driver.
> 
> 
> ChenYu
> 

Hi ChenYu,

Thanks for taking the time, could you please take a look at the v7?

https://lore.kernel.org/lkml/20230207014800.7619-1-moudy.ho@mediatek.com/

Regards,
Moudy
> > +       if (r)
> > +               goto unregister_gates;
> > +
> > +       platform_set_drvdata(pdev, clk_data);
> > +
> > +       return r;
> > +
> > +unregister_gates:
> > +       mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks),
> > clk_data);
> > +free_vpp0_data:
> > +       mtk_free_clk_data(clk_data);
> > +       return r;
> > +}
> > +
> > +static int clk_mt8195_vpp0_remove(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *node = dev->parent->of_node;
> > +       struct clk_hw_onecell_data *clk_data =
> > platform_get_drvdata(pdev);
> > +
> > +       of_clk_del_provider(node);
> > +       mtk_clk_unregister_gates(vpp0_clks, ARRAY_SIZE(vpp0_clks),
> > clk_data);
> > +       mtk_free_clk_data(clk_data);
> > +
> > +       return 0;
> > +}
> > 
> >  static struct platform_driver clk_mt8195_vpp0_drv = {
> > -       .probe = mtk_clk_simple_probe,
> > -       .remove = mtk_clk_simple_remove,
> > +       .probe = clk_mt8195_vpp0_probe,
> > +       .remove = clk_mt8195_vpp0_remove,
> >         .driver = {
> >                 .name = "clk-mt8195-vpp0",
> > -               .of_match_table = of_match_clk_mt8195_vpp0,
> >         },
> >  };
> >  builtin_platform_driver(clk_mt8195_vpp0_drv);
> > diff --git a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > index ffd52c762890..3b88c69e96c9 100644
> > --- a/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > +++ b/drivers/clk/mediatek/clk-mt8195-vpp1.c
> > @@ -84,26 +84,54 @@ static const struct mtk_gate vpp1_clks[] = {
> >         GATE_VPP1_1(CLK_VPP1_VPP_SPLIT_26M, "vpp1_vpp_split_26m",
> > "clk26m", 26),
> >  };
> > 
> > -static const struct mtk_clk_desc vpp1_desc = {
> > -       .clks = vpp1_clks,
> > -       .num_clks = ARRAY_SIZE(vpp1_clks),
> > -};
> > +static int clk_mt8195_vpp1_probe(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *node = dev->parent->of_node;
> > +       struct clk_onecell_data *clk_data;
> > +       int r;
> > 
> > -static const struct of_device_id of_match_clk_mt8195_vpp1[] = {
> > -       {
> > -               .compatible = "mediatek,mt8195-vppsys1",
> > -               .data = &vpp1_desc,
> > -       }, {
> > -               /* sentinel */
> > -       }
> > -};
> > +       clk_data = mtk_alloc_clk_data(CLK_VPP1_NR_CLK);
> > +       if (!clk_data)
> > +               return -ENOMEM;
> > +
> > +       r = mtk_clk_register_gates(node, vpp1_clks,
> > ARRAY_SIZE(vpp1_clks), clk_data);
> > +       if (r)
> > +               goto free_vpp1_data;
> > +
> > +       r = of_clk_add_provider(node, of_clk_src_onecell_get,
> > clk_data);
> > +       if (r)
> > +               goto unregister_gates;
> > +
> > +       platform_set_drvdata(pdev, clk_data);
> > +
> > +       return r;
> > +
> > +unregister_gates:
> > +       mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks),
> > clk_data);
> > +free_vpp1_data:
> > +       mtk_free_clk_data(clk_data);
> > +       return r;
> > +}
> > +
> > +static int clk_mt8195_vpp1_remove(struct platform_device *pdev)
> > +{
> > +       struct device *dev = &pdev->dev;
> > +       struct device_node *node = dev->parent->of_node;
> > +       struct clk_hw_onecell_data *clk_data =
> > platform_get_drvdata(pdev);
> > +
> > +       of_clk_del_provider(node);
> > +       mtk_clk_unregister_gates(vpp1_clks, ARRAY_SIZE(vpp1_clks),
> > clk_data);
> > +       mtk_free_clk_data(clk_data);
> > +
> > +       return 0;
> > +}
> > 
> >  static struct platform_driver clk_mt8195_vpp1_drv = {
> > -       .probe = mtk_clk_simple_probe,
> > -       .remove = mtk_clk_simple_remove,
> > +       .probe = clk_mt8195_vpp1_probe,
> > +       .remove = clk_mt8195_vpp1_remove,
> >         .driver = {
> >                 .name = "clk-mt8195-vpp1",
> > -               .of_match_table = of_match_clk_mt8195_vpp1,
> >         },
> >  };
> >  builtin_platform_driver(clk_mt8195_vpp1_drv);
> > --
> > 2.18.0
> > 

^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2023-02-07  1:59 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-01-18  3:15 [PATCH v6 0/4] Migrate MT8195 VPPSYS 0/1 to mtk-mmsys driver Moudy Ho
2023-01-18  3:15 ` [PATCH v6 1/4] dt-bindings: arm: mediatek: migrate MT8195 vppsys0/1 " Moudy Ho
2023-01-19 11:14   ` Krzysztof Kozlowski
2023-01-19 16:08   ` Matthias Brugger
2023-01-26  2:05     ` Stephen Boyd
2023-01-26 14:32       ` Matthias Brugger
2023-01-26 14:33         ` Matthias Brugger
2023-01-27 23:20   ` Stephen Boyd
2023-01-18  3:15 ` [PATCH v6 2/4] dt-bindings: arm: mediatek: mmsys: Add support for MT8195 VPPSYS Moudy Ho
2023-01-18 15:59   ` Rob Herring
2023-01-30 11:27   ` Matthias Brugger
2023-01-18  3:15 ` [PATCH v6 3/4] clk: mediatek: remove MT8195 vppsys/0/1 simple_probe Moudy Ho
2023-01-19 15:50   ` Matthias Brugger
2023-01-27 23:20   ` Stephen Boyd
2023-01-30 19:36   ` Stephen Boyd
2023-01-31  1:57     ` Moudy Ho (何宗原)
2023-01-31  8:33     ` AngeloGioacchino Del Regno
2023-01-31  9:50   ` Chen-Yu Tsai
2023-02-07  1:58     ` Moudy Ho (何宗原)
     [not found] ` <20230118031509.29834-5-moudy.ho@mediatek.com>
2023-01-30 11:28   ` [PATCH v6 4/4] soc: mediatek: mmsys: add support for MT8195 VPPSYS Matthias Brugger

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).