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From: Ashok Raj <ashok.raj@intel.com>
To: Borislav Petkov <bp@alien8.de>, Thomas Gleixner <tglx@linutronix.de>
Cc: Ashok Raj <ashok.raj@intel.com>,
	LKML <linux-kernel@vger.kernel.org>, x86 <x86@kernel.org>,
	Ingo Molnar <mingo@kernel.org>, Tony Luck <tony.luck@intel.com>,
	Dave Hansen <dave.hansen@intel.com>,
	Alison Schofield <alison.schofield@intel.com>,
	Reinette Chatre <reinette.chatre@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Stefan Talpalaru <stefantalpalaru@yahoo.com>,
	David Woodhouse <dwmw2@infradead.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Jonathan Corbet <corbet@lwn.net>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Peter Zilstra <peterz@infradead.org>,
	Andy Lutomirski <luto@kernel.org>,
	Andrew Cooper <Andrew.Cooper3@citrix.com>,
	Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Martin Pohlack <mpohlack@amazon.de>
Subject: [Patch v3 Part2 3/9] x86/microcode/intel: Fix collect_cpu_info() to reflect current microcode
Date: Mon, 30 Jan 2023 13:39:49 -0800	[thread overview]
Message-ID: <20230130213955.6046-4-ashok.raj@intel.com> (raw)
In-Reply-To: <20230130213955.6046-1-ashok.raj@intel.com>

Currently collect_cpu_info() is only returning what was cached earlier
instead of reading the current revision from the proper MSR.

Collect the current revision and report that value instead of reflecting
what was cached in the past.

[TBD:
    Need to change microcode/amd.c. I didn't quite follow the logic since
    it reports the revision from the patch file, instead of reporting the
    real PATCH_LEVEL MSR.

    Untested on AMD.
]

Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>
Cc: x86 <x86@kernel.org>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Alison Schofield <alison.schofield@intel.com>
Cc: Reinette Chatre <reinette.chatre@intel.com>
Cc: Thomas Gleixner (Intel) <tglx@linutronix.de>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Stefan Talpalaru <stefantalpalaru@yahoo.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Rafael J. Wysocki <rafael@kernel.org>
Cc: Peter Zilstra (Intel) <peterz@infradead.org>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Andrew Cooper <Andrew.Cooper3@citrix.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Martin Pohlack <mpohlack@amazon.de>
---
 arch/x86/kernel/cpu/microcode/intel.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 467cf37ea90a..de8e591c42cd 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -542,6 +542,13 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 {
 	struct cpuinfo_x86 *c = &cpu_data(cpu_num);
 	unsigned int val[2];
+	int rev;
+
+	/*
+	 * intel_get_microcode_revision() reads a per-core MSR
+	 * to read the revision (MSR_IA32_UCODE_REV).
+	 */
+	WARN_ON_ONCE(cpu_num != smp_processor_id());
 
 	memset(csig, 0, sizeof(*csig));
 
@@ -553,7 +560,9 @@ static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
 		csig->pf = 1 << ((val[1] >> 18) & 7);
 	}
 
-	csig->rev = c->microcode;
+	rev = intel_get_microcode_revision();
+	c->microcode = rev;
+	csig->rev = rev;
 
 	return 0;
 }
-- 
2.37.2


  parent reply	other threads:[~2023-01-30 21:40 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-30 21:39 [Patch v3 Part2 0/9] x86/microcode: Declare microcode safe for late loading Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 1/9] x86/microcode: Taint kernel only if microcode loading was successful Ashok Raj
2023-01-31 11:50   ` Borislav Petkov
2023-01-31 16:51     ` Ashok Raj
2023-01-31 20:20       ` Borislav Petkov
2023-01-31 22:54         ` Ashok Raj
2023-02-01 12:44           ` Borislav Petkov
2023-02-01 15:42             ` Ashok Raj
2023-02-01 21:47             ` Ashok Raj
2023-02-01 22:06               ` Borislav Petkov
2023-02-01 22:19                 ` Ashok Raj
2023-02-01 22:26                   ` Borislav Petkov
2023-01-31 12:17   ` Li, Aubrey
2023-01-31 15:32     ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 2/9] x86/microcode: Report invalid writes to reload sysfs file Ashok Raj
2023-01-31 15:57   ` [tip: x86/microcode] x86/microcode: Allow only "1" as a late reload trigger value tip-bot2 for Ashok Raj
2023-01-30 21:39 ` Ashok Raj [this message]
2023-01-31 16:48   ` [Patch v3 Part2 3/9] x86/microcode/intel: Fix collect_cpu_info() to reflect current microcode Borislav Petkov
2023-01-31 17:34     ` Luck, Tony
2023-01-31 17:41       ` Ashok Raj
2023-01-31 20:40       ` Borislav Petkov
2023-01-31 20:49         ` Luck, Tony
2023-01-31 21:08           ` Borislav Petkov
2023-01-31 22:32             ` Ashok Raj
2023-01-31 22:43             ` Luck, Tony
2023-02-01 12:53               ` Borislav Petkov
2023-02-01 15:13                 ` Ashok Raj
2023-02-01 15:25                   ` Borislav Petkov
2023-02-01 16:15                 ` Luck, Tony
2023-02-01 19:13   ` Dave Hansen
2023-02-01 19:32     ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 4/9] x86/microcode: Do not call apply_microcode() on sibling threads Ashok Raj
2023-02-01 22:21   ` Dave Hansen
2023-02-01 22:40     ` Borislav Petkov
2023-02-02  2:51       ` Ashok Raj
2023-02-02  9:40         ` Borislav Petkov
2023-02-02 16:34           ` Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 5/9] x86/microcode: Move late load warning to the same function that taints kernel Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 6/9] x86/microcode/intel: Add minimum required revision to microcode header Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 7/9] x86/microcode: Add a generic mechanism to declare support for minrev Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 8/9] x86/microcode/intel: Drop wbinvd() from microcode loading Ashok Raj
2023-01-30 21:39 ` [Patch v3 Part2 9/9] x86/microcode: Provide an option to override minrev enforcement Ashok Raj

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