From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Peter Zijlstra (Intel)" <peterz@infradead.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>
Cc: Ricardo Neri <ricardo.neri@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Ben Segall <bsegall@google.com>,
Daniel Bristot de Oliveira <bristot@redhat.com>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Len Brown <len.brown@intel.com>, Mel Gorman <mgorman@suse.de>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Steven Rostedt <rostedt@goodmis.org>,
Tim Chen <tim.c.chen@linux.intel.com>,
Valentin Schneider <vschneid@redhat.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Ionela Voinescu <ionela.voinescu@arm.com>,
x86@kernel.org,
"Joel Fernandes (Google)" <joel@joelfernandes.org>,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
"Tim C . Chen" <tim.c.chen@intel.com>
Subject: [PATCH v3 22/24] x86/cpufeatures: Add feature bit for HRESET
Date: Mon, 6 Feb 2023 21:11:03 -0800 [thread overview]
Message-ID: <20230207051105.11575-23-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20230207051105.11575-1-ricardo.neri-calderon@linux.intel.com>
The HRESET instruction prevents the classification of the current task
from influencing the classification of the next task when running serially
on the same logical processor.
Cc: Ben Segall <bsegall@google.com>
Cc: Daniel Bristot de Oliveira <bristot@redhat.com>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: Joel Fernandes (Google) <joel@joelfernandes.org>
Cc: Len Brown <len.brown@intel.com>
Cc: Lukasz Luba <lukasz.luba@arm.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Tim C. Chen <tim.c.chen@intel.com>
Cc: Valentin Schneider <vschneid@redhat.com>
Cc: x86@kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Changes since v2:
* None
Changes since v1:
* None
---
arch/x86/include/asm/cpufeatures.h | 1 +
arch/x86/include/asm/msr-index.h | 4 +++-
arch/x86/kernel/cpu/scattered.c | 1 +
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 8a6261a5dbbf..eb859a82b22a 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -309,6 +309,7 @@
#define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */
#define X86_FEATURE_SMBA (11*32+21) /* "" Slow Memory Bandwidth Allocation */
#define X86_FEATURE_BMEC (11*32+22) /* "" Bandwidth Monitoring Event Configuration */
+#define X86_FEATURE_HRESET (11*32+23) /* Hardware history reset instruction */
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
#define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 0ea25cc9c621..dc96944d61a6 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1109,6 +1109,9 @@
#define MSR_IA32_HW_FEEDBACK_THREAD_CONFIG 0x17d4
#define MSR_IA32_HW_FEEDBACK_CHAR 0x17d2
+/* Hardware History Reset */
+#define MSR_IA32_HW_HRESET_ENABLE 0x17da
+
/* x2APIC locked status */
#define MSR_IA32_XAPIC_DISABLE_STATUS 0xBD
#define LEGACY_XAPIC_DISABLED BIT(0) /*
@@ -1116,5 +1119,4 @@
* disabling x2APIC will cause
* a #GP
*/
-
#endif /* _ASM_X86_MSR_INDEX_H */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 0dad49a09b7a..cb8a0e7a4fdb 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -28,6 +28,7 @@ static const struct cpuid_bit cpuid_bits[] = {
{ X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 },
{ X86_FEATURE_INTEL_PPIN, CPUID_EBX, 0, 0x00000007, 1 },
{ X86_FEATURE_RRSBA_CTRL, CPUID_EDX, 2, 0x00000007, 2 },
+ { X86_FEATURE_HRESET, CPUID_EAX, 22, 0x00000007, 1 },
{ X86_FEATURE_CQM_LLC, CPUID_EDX, 1, 0x0000000f, 0 },
{ X86_FEATURE_CQM_OCCUP_LLC, CPUID_EDX, 0, 0x0000000f, 1 },
{ X86_FEATURE_CQM_MBM_TOTAL, CPUID_EDX, 1, 0x0000000f, 1 },
--
2.25.1
next prev parent reply other threads:[~2023-02-07 5:03 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-07 5:10 [PATCH v3 00/24] sched: Introduce classes of tasks for load balance Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 01/24] sched/task_struct: Introduce IPC classes of tasks Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 02/24] sched: Add interfaces for IPC classes Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 03/24] sched/core: Initialize the IPC class of a new task Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 04/24] sched/core: Add user_tick as argument to scheduler_tick() Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 05/24] sched/core: Update the IPC class of the current task Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 06/24] sched/fair: Collect load-balancing stats for IPC classes Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 07/24] sched/fair: Compute IPC class scores for load balancing Ricardo Neri
2023-03-28 10:00 ` Vincent Guittot
2023-03-30 2:07 ` Ricardo Neri
2023-03-31 12:20 ` Vincent Guittot
2023-04-17 22:52 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 08/24] sched/fair: Use IPCC stats to break ties between asym_packing sched groups Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 09/24] sched/fair: Use IPCC stats to break ties between fully_busy SMT groups Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 10/24] sched/fair: Use IPCC scores to select a busiest runqueue Ricardo Neri
2023-03-28 10:03 ` Vincent Guittot
2023-03-30 2:14 ` Ricardo Neri
2023-03-31 12:23 ` Vincent Guittot
2023-04-17 23:01 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 11/24] thermal: intel: hfi: Introduce Intel Thread Director classes Ricardo Neri
2023-03-27 16:31 ` Rafael J. Wysocki
2023-03-28 23:42 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 12/24] x86/cpufeatures: Add the Intel Thread Director feature definitions Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 13/24] thermal: intel: hfi: Store per-CPU IPCC scores Ricardo Neri
2023-03-27 16:37 ` Rafael J. Wysocki
2023-03-28 23:43 ` Ricardo Neri
2023-03-29 12:08 ` Rafael J. Wysocki
2023-03-30 2:15 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 14/24] thermal: intel: hfi: Update the IPC class of the current task Ricardo Neri
2023-03-27 16:42 ` Rafael J. Wysocki
2023-03-28 23:41 ` Ricardo Neri
2023-03-29 12:13 ` Rafael J. Wysocki
2023-03-30 3:06 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 15/24] thermal: intel: hfi: Report the IPC class score of a CPU Ricardo Neri
2023-03-27 16:50 ` Rafael J. Wysocki
2023-03-28 23:41 ` Ricardo Neri
2023-03-29 12:17 ` Rafael J. Wysocki
2023-03-31 2:07 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 16/24] thermal: intel: hfi: Define a default class for unclassified tasks Ricardo Neri
2023-03-27 16:51 ` Rafael J. Wysocki
2023-03-28 23:49 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 17/24] thermal: intel: hfi: Enable the Intel Thread Director Ricardo Neri
2023-03-27 16:53 ` Rafael J. Wysocki
2023-03-28 23:50 ` Ricardo Neri
2023-02-07 5:10 ` [PATCH v3 18/24] sched/task_struct: Add helpers for IPC classification Ricardo Neri
2023-02-07 5:11 ` [PATCH v3 19/24] sched/core: Initialize helpers of task classification Ricardo Neri
2023-02-07 5:11 ` [PATCH v3 20/24] sched/fair: Introduce sched_smt_siblings_idle() Ricardo Neri
2023-02-07 5:11 ` [PATCH v3 21/24] thermal: intel: hfi: Implement model-specific checks for task classification Ricardo Neri
2023-03-27 17:03 ` Rafael J. Wysocki
2023-03-29 0:15 ` Ricardo Neri
2023-03-29 12:21 ` Rafael J. Wysocki
2023-03-30 2:41 ` Ricardo Neri
2023-03-31 17:08 ` Rafael J. Wysocki
2023-04-03 14:12 ` Ricardo Neri
2023-02-07 5:11 ` Ricardo Neri [this message]
2023-02-07 5:11 ` [PATCH v3 23/24] x86/hreset: Configure history reset Ricardo Neri
2023-02-07 5:11 ` [PATCH v3 24/24] x86/process: Reset hardware history in context switch Ricardo Neri
2023-03-05 22:49 ` [PATCH v3 00/24] sched: Introduce classes of tasks for load balance Ricardo Neri
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