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(075-129-116-198.res.spectrum.com. [75.129.116.198]) by smtp.gmail.com with ESMTPSA id ey17-20020a05622a4c1100b003b86b088755sm4902460qtb.15.2023.02.22.14.13.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Feb 2023 14:13:18 -0800 (PST) From: Brian Gerst To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: David Woodhouse , Usama Arif , Thomas Gleixner , Borislav Petkov , "H . Peter Anvin" , Peter Zijlstra , Andy Lutomirski , Ingo Molnar , Brian Gerst Subject: [PATCH 1/6] x86/smpboot: Use CPU number instead of APIC ID for single CPU startup Date: Wed, 22 Feb 2023 17:12:56 -0500 Message-Id: <20230222221301.245890-2-brgerst@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230222221301.245890-1-brgerst@gmail.com> References: <20230222221301.245890-1-brgerst@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Encoding the CPU number directly in smpboot_control skips the APIC ID lookup when booting a single CPU. This will enable the boot CPU to use the same code as secondaries, since the APIC ID array is not populated during early boot. Signed-off-by: Brian Gerst --- arch/x86/kernel/head_64.S | 12 +++++++----- arch/x86/kernel/smpboot.c | 2 +- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index 0e4e53d231db..c1253aa737ca 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -252,20 +252,22 @@ SYM_INNER_LABEL(secondary_startup_64_no_verify, SYM_L_GLOBAL) jz .Lsetup_cpu /* - * Secondary CPUs find out the offsets via the APIC ID. For parallel - * boot the APIC ID is retrieved from CPUID, otherwise it's encoded - * in smpboot_control: + * For parallel boot, the APIC ID is retrieved from CPUID, and then + * used to look up the CPU number. For booting a single CPU, the + * CPU number is encoded in smpboot_control. + * * Bit 31 STARTUP_SECONDARY flag (checked above) * Bit 30 STARTUP_APICID_CPUID_0B flag (use CPUID 0x0b) * Bit 29 STARTUP_APICID_CPUID_01 flag (use CPUID 0x01) - * Bit 0-24 APIC ID if STARTUP_APICID_CPUID_xx flags are not set + * Bit 0-24 CPU# if STARTUP_APICID_CPUID_xx flags are not set */ testl $STARTUP_APICID_CPUID_0B, %edx jnz .Luse_cpuid_0b testl $STARTUP_APICID_CPUID_01, %edx jnz .Luse_cpuid_01 andl $0x0FFFFFFF, %edx - jmp .Lsetup_AP + movl %edx, %ecx + jmp .Linit_cpu_data .Luse_cpuid_01: mov $0x01, %eax diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 5b6d72b3d14b..e1a2843c2841 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -1140,7 +1140,7 @@ static int do_boot_cpu(int apicid, int cpu, struct task_struct *idle, early_gdt_descr.address = (unsigned long)get_cpu_gdt_rw(cpu); initial_stack = idle->thread.sp; } else if (!do_parallel_bringup) { - smpboot_control = STARTUP_SECONDARY | apicid; + smpboot_control = STARTUP_SECONDARY | cpu; } /* Enable the espfix hack for this CPU */ -- 2.39.2