From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31060C7618A for ; Thu, 16 Mar 2023 22:22:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230083AbjCPWV7 (ORCPT ); Thu, 16 Mar 2023 18:21:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230107AbjCPWVo (ORCPT ); Thu, 16 Mar 2023 18:21:44 -0400 Received: from mail-wm1-x32a.google.com (mail-wm1-x32a.google.com [IPv6:2a00:1450:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F3DBB1A43 for ; Thu, 16 Mar 2023 15:21:17 -0700 (PDT) Received: by mail-wm1-x32a.google.com with SMTP id m18-20020a05600c3b1200b003ed2a3d635eso2172490wms.4 for ; Thu, 16 Mar 2023 15:21:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1679005275; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QbZumu4dMY0Za38bxLjojwYOtrQ4rJ/sJrcRrt0N9M0=; b=akDU+NONCJCdGBGVARuhAyYEyH1e56zvKd1pHTUrwEbXIROtqT3NRhj/nP1vMj3Ji4 whfGxuIXnEs9OPIXC7ByNlQRB01JoZidvSqL+LZfNQbYOVKfMa9wQr6or2mQUc4oOSFO JFzz/rb/5RproOJxOSDYRXu/q96ur4PJhWRJM8SOgQgp2pK/fbIuafKBV1QiZz/56R2V bOBSZmjMZoOVMiwuL8oEE6CEVYm+C7Ob3sqfSe1nlrxHZzfHhPSQGtSqtyXrjG2GThID ibe8eJWI7Du11Jjes+OCpBrQ67FEzvvIbS4ZdvE+tMLEBhUGcYeBi7giasJxLASf9I+d bNtA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1679005275; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QbZumu4dMY0Za38bxLjojwYOtrQ4rJ/sJrcRrt0N9M0=; b=rhyqjQk/iJLvFv0l/GeTWZwTy5GLXOqHiohWQbZnasObGxhwB0QsuierE7EXFiUnE3 y3LHRvqeuVKa5zNF9nAlZco7E5r6vTIXNZ6uWYEHFF/UaIiteaQ00PVx4oyV177FlbfH MocZy9Pb0/E1vXp0/X3WVITI1XPMyRullgdUynmQ3Hg36pAnzvQo3EtKQDr+8Ew04a8H TLrdfE3WwzIotMmLG7UGhAce68Eerdf9pKtrN+3JKXsCg57XYaiIjKHwh8F+Zu3WAAn9 2OwNXMgPhU8S8OJv2Tk7ICSDvpvLmzAueGumwaf8sknyjpjR+fmlVnK/fYCJs8kQUYbR edpQ== X-Gm-Message-State: AO0yUKX8FBYSgjvZNGDbHIZPALnObOwjVHZl/bSvBDNAHbPQxb0MP/Ba xu7HwTgmh2HuOCNA3ExgzK6jrw== X-Google-Smtp-Source: AK7set8sd0u7sbc+Ib3EpcUOHHi2QNF0y/CMx/fMrvdIlw/20Y/tJ7QeYsze/abbNq1k17QArW6Liw== X-Received: by 2002:a05:600c:1f0f:b0:3df:ef18:b0a1 with SMTP id bd15-20020a05600c1f0f00b003dfef18b0a1mr23732968wmb.12.1679005275673; Thu, 16 Mar 2023 15:21:15 -0700 (PDT) Received: from usaari01.cust.communityfibre.co.uk ([2a02:6b6a:b566:0:4b87:78c3:3abe:7b0d]) by smtp.gmail.com with ESMTPSA id f9-20020adff989000000b002cea392f000sm439256wrr.69.2023.03.16.15.21.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 15:21:15 -0700 (PDT) From: Usama Arif To: dwmw2@infradead.org, tglx@linutronix.de, kim.phillips@amd.com, brgerst@gmail.com Cc: piotrgorski@cachyos.org, oleksandr@natalenko.name, arjan@linux.intel.com, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, x86@kernel.org, pbonzini@redhat.com, paulmck@kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, rcu@vger.kernel.org, mimoja@mimoja.de, hewenliang4@huawei.com, thomas.lendacky@amd.com, seanjc@google.com, pmenzel@molgen.mpg.de, fam.zheng@bytedance.com, punit.agrawal@bytedance.com, simon.evans@bytedance.com, liangma@liangbit.com, gpiccoli@igalia.com, David Woodhouse , Usama Arif Subject: [PATCH v15 04/12] x86/smpboot: Reference count on smpboot_setup_warm_reset_vector() Date: Thu, 16 Mar 2023 22:21:01 +0000 Message-Id: <20230316222109.1940300-5-usama.arif@bytedance.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230316222109.1940300-1-usama.arif@bytedance.com> References: <20230316222109.1940300-1-usama.arif@bytedance.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Woodhouse When bringing up a secondary CPU from do_boot_cpu(), the warm reset flag is set in CMOS and the starting IP for the trampoline written inside the BDA at 0x467. Once the CPU is running, the CMOS flag is unset and the value in the BDA cleared. To allow for parallel bringup of CPUs, add a reference count to track the number of CPUs currently bring brought up, and clear the state only when the count reaches zero. Since the RTC spinlock is required to write to the CMOS, it can be used for mutual exclusion on the refcount too. Signed-off-by: David Woodhouse Signed-off-by: Usama Arif Tested-by: Paul E. McKenney Tested-by: Kim Phillips Tested-by: Oleksandr Natalenko Tested-by: Guilherme G. Piccoli --- arch/x86/kernel/smpboot.c | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 55cad72715d9..3a793772a2aa 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -121,17 +121,20 @@ int arch_update_cpu_topology(void) return retval; } + +static unsigned int smpboot_warm_reset_vector_count; + static inline void smpboot_setup_warm_reset_vector(unsigned long start_eip) { unsigned long flags; spin_lock_irqsave(&rtc_lock, flags); - CMOS_WRITE(0xa, 0xf); + if (!smpboot_warm_reset_vector_count++) { + CMOS_WRITE(0xa, 0xf); + *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = start_eip >> 4; + *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = start_eip & 0xf; + } spin_unlock_irqrestore(&rtc_lock, flags); - *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_HIGH)) = - start_eip >> 4; - *((volatile unsigned short *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = - start_eip & 0xf; } static inline void smpboot_restore_warm_reset_vector(void) @@ -143,10 +146,12 @@ static inline void smpboot_restore_warm_reset_vector(void) * to default values. */ spin_lock_irqsave(&rtc_lock, flags); - CMOS_WRITE(0, 0xf); + if (!--smpboot_warm_reset_vector_count) { + CMOS_WRITE(0, 0xf); + *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; + } spin_unlock_irqrestore(&rtc_lock, flags); - *((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0; } /* -- 2.25.1