From: Jessica Zhang <quic_jesszhan@quicinc.com>
To: Rob Clark <robdclark@gmail.com>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Marijn Suijten <marijn.suijten@somainline.org>
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>,
<linux-arm-msm@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<freedreno@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>,
Jessica Zhang <quic_jesszhan@quicinc.com>
Subject: [PATCH v2 1/4] drm/msm/dsi: Adjust pclk rate for compression
Date: Fri, 5 May 2023 14:23:48 -0700 [thread overview]
Message-ID: <20230405-add-dsc-support-v2-1-1072c70e9786@quicinc.com> (raw)
In-Reply-To: <20230405-add-dsc-support-v2-0-1072c70e9786@quicinc.com>
Adjust the pclk rate to divide hdisplay by the compression ratio when DSC
is enabled.
Changes in v2:
- Adjusted pclk_rate math to divide only the hdisplay value by
compression ratio
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 43a5ec33eee8..0e5778e8091f 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -561,7 +561,8 @@ void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host)
clk_disable_unprepare(msm_host->byte_clk);
}
-static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool is_bonded_dsi)
+static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode,
+ struct drm_dsc_config *dsc, bool is_bonded_dsi)
{
unsigned long pclk_rate;
@@ -576,6 +577,14 @@ static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, bool
if (is_bonded_dsi)
pclk_rate /= 2;
+ /* If DSC is enabled, divide hdisplay by compression ratio */
+ if (dsc) {
+ int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * msm_dsc_get_bpp_int(dsc),
+ dsc->bits_per_component * 3);
+ int fps = DIV_ROUND_UP(pclk_rate, mode->htotal * mode->vtotal);
+ pclk_rate = (new_hdisplay + (mode->htotal - mode->hdisplay)) * mode->vtotal * fps;
+ }
+
return pclk_rate;
}
@@ -585,7 +594,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
struct msm_dsi_host *msm_host = to_msm_dsi_host(host);
u8 lanes = msm_host->lanes;
u32 bpp = dsi_get_bpp(msm_host->format);
- unsigned long pclk_rate = dsi_get_pclk_rate(mode, is_bonded_dsi);
+ unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi);
u64 pclk_bpp = (u64)pclk_rate * bpp;
if (lanes == 0) {
@@ -604,7 +613,7 @@ unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_d
static void dsi_calc_pclk(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
{
- msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi);
+ msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi);
msm_host->byte_clk_rate = dsi_byte_clk_get_rate(&msm_host->base, is_bonded_dsi,
msm_host->mode);
@@ -634,7 +643,7 @@ int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
dsi_calc_pclk(msm_host, is_bonded_dsi);
- pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, is_bonded_dsi) * bpp;
+ pclk_bpp = (u64)dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi) * bpp;
do_div(pclk_bpp, 8);
msm_host->src_clk_rate = pclk_bpp;
--
2.40.1
next prev parent reply other threads:[~2023-05-05 21:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-05 21:23 [PATCH v2 0/4] Add DSC v1.2 Support for DSI Jessica Zhang
2023-05-05 21:23 ` Jessica Zhang [this message]
2023-05-05 21:49 ` [PATCH v2 1/4] drm/msm/dsi: Adjust pclk rate for compression Jessica Zhang
2023-05-08 21:56 ` Marijn Suijten
2023-05-19 19:04 ` Jessica Zhang
2023-05-19 21:20 ` Marijn Suijten
2023-05-05 21:23 ` [PATCH v2 2/4] drm/msm/dsi: Fix compressed word count calculation Jessica Zhang
2023-05-05 21:23 ` [PATCH v2 3/4] drm/msm/dpu: Add DPU_INTF_DATA_COMPRESS feature flag Jessica Zhang
2023-05-07 16:00 ` Marijn Suijten
2023-05-07 19:21 ` Dmitry Baryshkov
2023-05-08 21:47 ` Marijn Suijten
2023-05-08 8:36 ` Konrad Dybcio
2023-05-08 21:53 ` Marijn Suijten
2023-05-08 21:46 ` Jessica Zhang
2023-05-08 21:50 ` Marijn Suijten
2023-05-08 23:08 ` Dmitry Baryshkov
2023-05-09 0:28 ` Abhinav Kumar
2023-05-09 0:48 ` Dmitry Baryshkov
2023-05-09 6:59 ` Marijn Suijten
2023-05-09 11:12 ` Dmitry Baryshkov
2023-05-05 21:23 ` [PATCH v2 4/4] drm/msm/dpu: Set DATA_COMPRESS for command mode Jessica Zhang
2023-05-07 16:06 ` Marijn Suijten
2023-05-08 23:17 ` Jessica Zhang
2023-05-09 0:00 ` [Freedreno] " Jessica Zhang
2023-05-09 6:49 ` Marijn Suijten
2023-05-09 6:46 ` Marijn Suijten
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