From: Brad Larson <blarson@amd.com>
To: <andy.shevchenko@gmail.com>
Cc: <adrian.hunter@intel.com>, <alcooperx@gmail.com>, <arnd@arndb.de>,
<blarson@amd.com>, <brendan.higgins@linux.dev>,
<briannorris@chromium.org>, <broonie@kernel.org>,
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<samuel@sholland.org>, <skhan@linuxfoundation.org>,
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<will@kernel.org>, <zhuyinbo@loongson.cn>
Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller
Date: Mon, 22 May 2023 19:12:56 -0700 [thread overview]
Message-ID: <20230523021256.61690-1-blarson@amd.com> (raw)
In-Reply-To: <CAHp75VdsfcHOOUHuAVA38kdUyq+vwMKFYCNxScogGAJDM8ywBQ@mail.gmail.com>
Hi Andy,
On Tue, May 16, 2023 at 00:05:32 Andy Shevchenko <andy.shevchenko@gmail.com> wrote:
> On Mon, May 15, 2023 at 9:18 PM Brad Larson <blarson@amd.com> wrote:
>>
>> The Pensando SoC controller is a SPI connected companion device
>> that is present in all Pensando SoC board designs. The essential
>> board management registers are accessed on chip select 0 with
>> board mgmt IO support accessed using additional chip selects.
>
> ...
>
>> +#include <linux/cdev.h>
>> +#include <linux/device.h>
>> +#include <linux/err.h>
>> +#include <linux/init.h>
>> +#include <linux/mod_devicetable.h>
>> +#include <linux/module.h>
>> +#include <linux/mutex.h>
>
>> +#include <linux/of.h>
>
> Unneeded inclusion.
Removed
>> +#include <linux/reset-controller.h>
>> +#include <linux/spi/spi.h>
>
> ...
>
>
>> + u8 tx_buf[PENCTRL_MAX_MSG_LEN];
>> + u8 rx_buf[PENCTRL_MAX_MSG_LEN];
>
> Does it need to be DMA-capable?
Doesn't need to be DMA-capable
> ...
>
>> + spi->chip_select = current_cs;
>> + spi->cs_gpiod = spi->controller->cs_gpiods[current_cs];
>
> Nowadays these require API calls instead of direct assignments.
Changed to:
spi_set_csgpiod(spi, 0, spi->controller->cs_gpiods[current_cs]);
> ...
>
>> +static int penctrl_release(struct inode *inode, struct file *filp)
>> +{
>> + filp->private_data = NULL;
>> + return 0;
>> +}
>
> Is it possible to unload the module without releasing the device node?
If the refcount is not zero the kernel prevents the module from being unloaded.
> ...
>
>> + u8 txbuf[3];
>> + u8 rxbuf[1];
>
> Same question about DMA.
Not DMA-capable
> ...
>
>> + ret = spi_sync(spi, &m);
>
>> + if (ret == 0)
>> + *val = rxbuf[0];
>> +
>> + return ret;
>
> Can also be written in more usual way:
>
> if (ret)
> return ret;
> ...
> return 0;
Yes, changed to:
ret = spi_sync(spi, &m);
if (ret)
return ret;
*val = rxbuf[0];
return 0;
> ...
>
>> + u8 txbuf[4];
>
> DMA?
Not DMA-capable
> ...
>
>> + spi->chip_select = 0;
>> + spi->cs_gpiod = spi->controller->cs_gpiods[0];
>
> Setter APIs.
Changed to:
spi_set_csgpiod(spi, 0, spi->controller->cs_gpiods[0]);
>
> ...
>
>> + spi->chip_select = 0;
>> + spi->cs_gpiod = spi->controller->cs_gpiods[0];
>
> Ditto.
Changed to:
spi_set_csgpiod(spi, 0, spi->controller->cs_gpiods[0]);
>> + ret = device_property_read_u32(spi->dev.parent, "num-cs", &num_cs);
>> + if (ret)
>> + return dev_err_probe(&spi->dev, ret,
>> + "number of chip-selects not defined\n");
>
> Hmm... Shouldn't SPI core take care of this in a generic way? Yes, I
> understand that you need the number for the allocation, but I would
> expect something like spi_fw_get_num_cs() to exist (seems not?).
>
No need to look into the parent node, changed to this:
num_cs = spi->controller->num_chipselect;
> ...
>
>> + penctrl->rcdev.of_node = spi->dev.of_node;
>
> Use device_set_node(). It helps to modify the data types beneath.
Added:
device_set_node(penctrl->rcdev.dev, dev_fwnode(&spi->dev));
Regards,
Brad
next prev parent reply other threads:[~2023-05-23 2:14 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-15 18:15 [PATCH v14 0/8] Support AMD Pensando Elba SoC Brad Larson
2023-05-15 18:15 ` [PATCH v14 1/8] dt-bindings: arm: add AMD Pensando boards Brad Larson
2023-05-15 18:16 ` [PATCH v14 2/8] dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-16 15:18 ` Mark Brown
2023-05-15 18:16 ` [PATCH v14 3/8] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson
2023-05-15 18:16 ` [PATCH v14 4/8] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2023-05-15 18:16 ` [PATCH v14 5/8] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2023-05-15 18:16 ` [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2023-05-16 7:17 ` Krzysztof Kozlowski
2023-05-16 7:54 ` Michal Simek
2023-05-23 19:28 ` Brad Larson
2023-05-24 11:52 ` Geert Uytterhoeven
2023-05-30 22:03 ` Brad Larson
2023-05-31 13:09 ` Geert Uytterhoeven
2023-06-05 23:52 ` Brad Larson
2023-05-15 18:16 ` [PATCH v14 7/8] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2023-05-15 18:16 ` [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson
2023-05-15 21:05 ` Andy Shevchenko
2023-05-23 2:12 ` Brad Larson [this message]
2023-05-16 5:19 ` Mahapatra, Amit Kumar
2023-05-16 7:36 ` Michal Simek
2023-05-17 11:14 ` Geert Uytterhoeven
2023-05-16 8:45 ` kernel test robot
2023-05-16 11:03 ` Arnd Bergmann
2023-05-23 22:11 ` Brad Larson
2023-05-24 12:41 ` Arnd Bergmann
2023-08-07 22:17 ` Brad Larson
2023-05-16 7:14 ` [PATCH v14 0/8] Support AMD Pensando Elba SoC Krzysztof Kozlowski
2023-05-17 14:43 ` (subset) " Mark Brown
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