From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84FBFC7EE2A for ; Fri, 2 Jun 2023 06:26:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233685AbjFBG0L (ORCPT ); Fri, 2 Jun 2023 02:26:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232000AbjFBG0J (ORCPT ); Fri, 2 Jun 2023 02:26:09 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 16F6DEB for ; Thu, 1 Jun 2023 23:26:05 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D4D2C1042; Thu, 1 Jun 2023 23:26:50 -0700 (PDT) Received: from a077893.blr.arm.com (unknown [10.162.41.6]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3BC7E3F67D; Thu, 1 Jun 2023 23:26:00 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org, broonie@kernel.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Marc Zyngier , Rob Herring , Suzuki K Poulose , James Morse , kvmarm@lists.linux.dev, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 00/14] arm64/sysreg: Convert TRBE registers to automatic generation Date: Fri, 2 Jun 2023 11:55:38 +0530 Message-Id: <20230602062552.565992-1-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series converts TRBE registers to automatic generation, after renaming their fields as per the auto-gen tools format. Although the following field still renames in arch/arm64/include/asm/sysreg.h, as it cannot be converted (shares bits with other fields) in the tools format. #define TRBSR_EL1_BSC_MASK GENMASK(5, 0) #define TRBSR_EL1_BSC_SHIFT 0 This series applies on v6.4-rc4. Changes in V2: - Renamed each individual TRBE register fields as per auto-gen tools - Converted each individual TRBE registers as per auto-gen tools - Added new register fields as per DDI0601 2023-03 Changes in V1: https://lore.kernel.org/all/20230531055524.16562-1-anshuman.khandual@arm.com/ Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Brown Cc: Rob Herring Cc: Suzuki K Poulose Cc: James Morse Cc: kvmarm@lists.linux.dev Cc: coresight@lists.linaro.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Anshuman Khandual (14): arm64/sysreg: Rename TRBLIMITR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBPTR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBBASER_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBSR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBMAR_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBTRG_EL1 fields per auto-gen tools format arm64/sysreg: Rename TRBIDR_EL1 fields per auto-gen tools format arm64/sysreg: Convert TRBLIMITR_EL1 register to automatic generation arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation arm64/sysreg: Convert TRBBASER_EL1 register to automatic generation arm64/sysreg: Convert TRBSR_EL1 register to automatic generation arm64/sysreg: Convert TRBMAR_EL1 register to automatic generation arm64/sysreg: Convert TRBTRG_EL1 register to automatic generation arm64/sysreg: Convert TRBIDR_EL1 register to automatic generation arch/arm64/include/asm/el2_setup.h | 2 +- arch/arm64/include/asm/sysreg.h | 50 +-------------- arch/arm64/kvm/debug.c | 2 +- arch/arm64/kvm/hyp/nvhe/debug-sr.c | 2 +- arch/arm64/tools/sysreg | 64 ++++++++++++++++++++ drivers/hwtracing/coresight/coresight-trbe.c | 33 +++++----- drivers/hwtracing/coresight/coresight-trbe.h | 38 +++++------- 7 files changed, 101 insertions(+), 90 deletions(-) -- 2.25.1