From: Borislav Petkov <bp@alien8.de>
To: Tony Luck <tony.luck@intel.com>, Yazen Ghannam <yazen.ghannam@amd.com>
Cc: Muralidhara M K <muralimk@amd.com>,
linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
Muralidhara M K <muralidhara.mk@amd.com>,
linux-doc@vger.kernel.org
Subject: [PATCH] Documentation: Begin a RAS section
Date: Tue, 28 Nov 2023 15:20:49 +0100 [thread overview]
Message-ID: <20231128142049.GTZWX3QQTSaQk/+u53@fat_crate.local> (raw)
In-Reply-To: <20231102114225.2006878-2-muralimk@amd.com>
On Thu, Nov 02, 2023 at 11:42:22AM +0000, Muralidhara M K wrote:
> From: Muralidhara M K <muralidhara.mk@amd.com>
>
> AMD systems with Scalable MCA, each machine check error of a SMCA bank
> type has an associated bit position in the bank's control (CTL) register.
Ontop of this. It is long overdue:
---
From: "Borislav Petkov (AMD)" <bp@alien8.de>
Date: Tue, 28 Nov 2023 14:37:56 +0100
Add some initial RAS documentation. The expectation is for this to
collect all the user-visible features for interacting with the RAS
features of the kernel.
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
---
Documentation/RAS/ras.rst | 26 ++++++++++++++++++++++++++
Documentation/index.rst | 1 +
2 files changed, 27 insertions(+)
create mode 100644 Documentation/RAS/ras.rst
diff --git a/Documentation/RAS/ras.rst b/Documentation/RAS/ras.rst
new file mode 100644
index 000000000000..2556b397cd27
--- /dev/null
+++ b/Documentation/RAS/ras.rst
@@ -0,0 +1,26 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Reliability, Availability and Serviceability features
+=====================================================
+
+This documents different aspects of the RAS functionality present in the
+kernel.
+
+Error decoding
+---------------
+
+* x86
+
+Error decoding on AMD systems should be done using the rasdaemon tool:
+https://github.com/mchehab/rasdaemon/
+
+While the daemon is running, it would automatically log and decode
+errors. If not, one can still decode such errors by supplying the
+hardware information from the error::
+
+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca
+
+Also, the user can pass particular family and model to decode the error
+string::
+
+ $ rasdaemon -p --status <STATUS> --ipid <IPID> --smca --family <CPU Family> --model <CPU Model> --bank <BANK_NUM>
diff --git a/Documentation/index.rst b/Documentation/index.rst
index 9dfdc826618c..36e61783437c 100644
--- a/Documentation/index.rst
+++ b/Documentation/index.rst
@@ -113,6 +113,7 @@ to ReStructured Text format, or are simply too old.
:maxdepth: 1
staging/index
+ RAS/ras
Translations
--
2.42.0.rc0.25.ga82fb66fed25
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
next prev parent reply other threads:[~2023-11-28 14:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-02 11:42 [PATCH v3 0/4] Few cleanups and AMD Family 19h Models 90h-9fh EDAC Support Muralidhara M K
2023-11-02 11:42 ` [PATCH v3 1/4] EDAC/mce_amd: Remove SMCA Extended Error code descriptions Muralidhara M K
2023-11-28 14:20 ` Borislav Petkov [this message]
2023-11-28 15:23 ` [PATCH] Documentation: Begin a RAS section Yazen Ghannam
2023-11-28 17:04 ` Randy Dunlap
2023-11-28 19:39 ` Borislav Petkov
2024-01-09 17:47 ` Jonathan Corbet
2024-01-09 18:36 ` Borislav Petkov
2024-01-09 19:44 ` Jonathan Corbet
2024-01-09 20:04 ` Borislav Petkov
2024-01-24 12:40 ` Borislav Petkov
2024-02-05 19:41 ` Borislav Petkov
2023-11-28 14:24 ` [tip: ras/core] EDAC/mce_amd: Remove SMCA Extended Error code descriptions tip-bot2 for Muralidhara M K
2023-11-02 11:42 ` [PATCH v3 2/4] x86/MCE/AMD: Add new MA_LLC, USR_DP, and USR_CP bank types Muralidhara M K
2023-11-29 10:33 ` [tip: ras/core] " tip-bot2 for Muralidhara M K
2023-11-02 11:42 ` [PATCH v3 3/4] EDAC/mc: Add support for HBM3 memory type Muralidhara M K
2023-11-02 11:42 ` [PATCH v3 4/4] EDAC/amd64: Add support for family 0x19, models 0x90-9f devices Muralidhara M K
2023-11-29 10:26 ` [PATCH v3 0/4] Few cleanups and AMD Family 19h Models 90h-9fh EDAC Support Borislav Petkov
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