From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 80B6B1549E for ; Thu, 11 Jan 2024 11:31:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="JVwFCSsl" Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-a2814fa68eeso433130666b.1 for ; Thu, 11 Jan 2024 03:31:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1704972711; x=1705577511; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=JVwFCSslN21uiI7WWioV2gT2cHvhLD6YZaxB2dyqeUE99eoFwPOt1uLSSG6qXmr1lh EEMSeXEME98CgCL5Wxk4LsvoI3cc7M/xe2EB0O8DnbVw0x0bn00RRTt596J1N81qYOaM LPl12SN7+zwDxrz+RGcPZNA3Vm5sw60wUPdkc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704972711; x=1705577511; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mmQnQzOW0HVCglZmRdERbSkiK/7LfpA/GFNr/QR6hMQ=; b=rweYSZKqngkzuRy/9koTsJpQpItX4r2rAYmdDbx5sDV2RIY12vJqbSKwVi3TsEOuCD PnKZz7YNf5pbF2WyEtcq+bkR1IEDVXYeXAUI8zkBjOpbcw1auXRiEt5DI/suJCGF9IVt kTo9fIAU8UpnxXRzMokPObEw51mjP0zc1Oyt/M8SIlYURw7aW9MPik3bUOx91T+C96eA RNinHq5OeT3Jo7suO/D9pwse4SiJDzXXaAsL4CtD2Rx+5ykSC1Bf351siPtJpDZTadrQ Lsgcg1NrKqnh62zTEvdi4VxDVxsBXMB+CQQeFY/P3Uu/LMBm5qsF9Q4tYnSWCBp3pQWi YdbQ== X-Gm-Message-State: AOJu0YwSDQEX1fuv6RGD9jg+FpqAazTaAr+SokJY07NMqskHu2za8lzb lDmM5bt9WJvlQagChA1L8Gq5CRvSgFx1ERZ/iRa4n67dl4M= X-Google-Smtp-Source: AGHT+IEwxxzXPLLv1VEdqxREzklSYppd5lbaTbwUT+50TBaJimhy6pmMsMZswLS5MIwZB1OhpMORJw== X-Received: by 2002:a17:906:a015:b0:a29:906e:b8fa with SMTP id p21-20020a170906a01500b00a29906eb8famr714066ejy.1.1704972711523; Thu, 11 Jan 2024 03:31:51 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it ([95.236.91.90]) by smtp.gmail.com with ESMTPSA id n3-20020a170906688300b00a26aa734349sm461565ejr.39.2024.01.11.03.31.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jan 2024 03:31:51 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Alexandre Torgue , linux-amarula@amarulasolutions.com, Lee Jones , Raphael Gallais-Pou , Dario Binacchi , Conor Dooley , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v7 2/5] ARM: dts: stm32: add DSI support on stm32f769 Date: Thu, 11 Jan 2024 12:31:39 +0100 Message-ID: <20240111113146.16011-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240111113146.16011-1-dario.binacchi@amarulasolutions.com> References: <20240111113146.16011-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add support for MIPI DSI Host controller. Since MIPI DSI is not available on stm32f746, the patch adds the "stm32f769.dtsi" file containing the dsi node inside. Signed-off-by: Dario Binacchi --- (no changes since v1) arch/arm/boot/dts/st/stm32f769.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) create mode 100644 arch/arm/boot/dts/st/stm32f769.dtsi diff --git a/arch/arm/boot/dts/st/stm32f769.dtsi b/arch/arm/boot/dts/st/stm32f769.dtsi new file mode 100644 index 000000000000..e09184f7079c --- /dev/null +++ b/arch/arm/boot/dts/st/stm32f769.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Dario Binacchi + */ + +#include "stm32f746.dtsi" + +/ { + soc { + dsi: dsi@40016c00 { + compatible = "st,stm32-dsi"; + reg = <0x40016c00 0x800>; + interrupts = <98>; + clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>; + clock-names = "pclk", "ref"; + resets = <&rcc STM32F7_APB2_RESET(DSI)>; + reset-names = "apb"; + status = "disabled"; + }; + }; +}; -- 2.43.0