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charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-3-8ec5b48eec05@phytec.de> References: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> In-Reply-To: <20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-0-8ec5b48eec05@phytec.de> To: Neil Armstrong , Jessica Zhang , Sam Ravnborg , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Catalin Marinas , Will Deacon CC: Primoz Fiser , , , , , , Yannic Moog X-Mailer: b4 0.12.3 X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA02SeyzVYRjHvb+bnxPt14/yYrFZZjXXxnq3zNTaeldWui1rNZ1444yk42RR q5NQjnKpJZ3Jnelkw3E5GDsbKjKsQkukQzPNLYsazcrPWct/n+f7fJ/n+f7x8LQ4yTjyilgV UcbKY1w5GVPlYGHtaaGqIz4drXtR14cSCs1X3Aeoqq2PQn8ac2hU2NnHooGleQ6ZBo8i3eNm BmVOmWiknxhikWblOY3et+RzqHihgUFp6RUsmm8eBqhLY2JR8sMnNEpt67REqwY9gyqXGwCa qrdHyy0FDKqfyWFRxpw7ShnxD3LAVQVVALf9LGJws3bUEut16RweGWrlcEH3MTyW8ZrCdWW3 cFZGCot/LdWwuHauicJZqz44p/UmLssd5HBdz3X8Q+8cIpyRBUSQGEUCUXoHnpdFzRRHxvXA ay9NGUAN+m01gOeh4AfTFoI1QMaLQikFh3+3AHNhAtBo/LZWWPGcsANOTH1mJWYEN7iarKMk thUuwq5PI+tsI2yB3U+/MtJSWtgJq1u8JZkWXKBhNp82W87CxncaVrKIa6yZCJPQSjgHb9/x lK7aCRoOTut7OfPoIoAlBjeJoWAL75YMr18She1wqv+BpVl3gbl907SZT8GGRQOVDUTthkDa /4G0GwIVAVoHxEuK8GiiVER7xUUlqki4VwTRA+kX7CxkTSAzH7cDigftAPK0q52Nn38tEW0i 5IlJRHk5THk1hsS3AyeecbW3eXHvBBGFSLmKRBMSR5T/uhRv5agGqcLB2T1+K85az5BAxnnA zTbY4Yg67a3Cad8rkvBlbLy4jX0zWhm2ySOpPGDyUeNhWF14oPZZWcIVY7JvzXyR7+5efjRI NR4QEfoxJq8S+HdmG7cdz9sqJpXXfa/puNCnsnZHeftvROk2N816HIoL9TOlcWpiPH3SWm1Q WZVOujLxUXLfXbQyXv4XFZ/FxvkCAAA= The imx8mp-phyboard-pollux has on-board lvds interface connections. An edt,etml1010g3dra panel is supported for this interface. Add device tree nodes for backlight and panel. Signed-off-by: Yannic Moog --- .../dts/freescale/imx8mp-phyboard-pollux-rdk.dts | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts index c8640cac3edc..9e8afceba65e 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts @@ -19,6 +19,30 @@ chosen { stdout-path = &uart1; }; + backlight_lvds: backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lvds1>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <11>; + enable-gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; + num-interpolated-steps = <2>; + power-supply = <®_lvds1_reg_en>; + pwms = <&pwm3 0 50000 0>; + }; + + panel1_lvds: panel-lvds { + compatible = "edt,etml1010g3dra"; + backlight = <&backlight_lvds>; + power-supply = <®_vcc_3v3_sw>; + + port { + panel1_in: endpoint { + remote-endpoint = <&ldb_lvds_ch1>; + }; + }; + }; + reg_can1_stby: regulator-can1-stby { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -39,6 +63,15 @@ reg_can2_stby: regulator-can2-stby { regulator-name = "can2-stby"; }; + reg_lvds1_reg_en: regulator-lvds1 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt = <1200000>; + regulator-min-microvolt = <1200000>; + regulator-name = "lvds1_reg_en"; + }; + reg_usb1_vbus: regulator-usb1-vbus { compatible = "regulator-fixed"; pinctrl-names = "default"; @@ -61,6 +94,13 @@ reg_usdhc2_vmmc: regulator-usdhc2 { startup-delay-us = <100>; off-on-delay-us = <12000>; }; + + reg_vcc_3v3_sw: regulator-vcc-3v3-sw { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3_SW"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; }; &eqos { @@ -135,10 +175,32 @@ led-3 { }; }; +&lcdif2 { + status = "okay"; +}; + +&lvds_bridge { + status = "okay"; + + ports { + port@2 { + ldb_lvds_ch1: endpoint { + remote-endpoint = <&panel1_in>; + }; + }; + }; +}; + &snvs_pwrkey { status = "okay"; }; +&pwm3 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; +}; + /* debug console */ &uart1 { pinctrl-names = "default"; @@ -289,6 +351,18 @@ MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x1e2 >; }; + pinctrl_lvds1: lvds1grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x12 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX8MP_IOMUXC_SPDIF_TX__PWM3_OUT 0x12 + >; + }; + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 -- 2.34.1