From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EEB7DC00140 for ; Mon, 15 Aug 2022 17:14:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229831AbiHOROL (ORCPT ); Mon, 15 Aug 2022 13:14:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33972 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229730AbiHOROJ (ORCPT ); Mon, 15 Aug 2022 13:14:09 -0400 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4BEB927CF0; Mon, 15 Aug 2022 10:14:06 -0700 (PDT) Received: from ip5b412258.dynamic.kabel-deutschland.de ([91.65.34.88] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1oNdf2-0005Ey-N0; Mon, 15 Aug 2022 19:13:56 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Chen-Yu Tsai , Jernej Skrabec , linux-sunxi@lists.linux.dev, Palmer Dabbelt , Paul Walmsley , Albert Ou , linux-riscv@lists.infradead.org Cc: Rob Herring , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Samuel Holland , Samuel Holland Subject: Re: [PATCH 05/12] riscv: Add the Allwinner SoC family Kconfig option Date: Mon, 15 Aug 2022 19:13:55 +0200 Message-ID: <2195565.3ZeAukHxDK@diego> In-Reply-To: <20220815050815.22340-6-samuel@sholland.org> References: <20220815050815.22340-1-samuel@sholland.org> <20220815050815.22340-6-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Montag, 15. August 2022, 07:08:08 CEST schrieb Samuel Holland: > Allwinner manufactures the sunxi family of application processors. This > includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8 > SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs. > > The first SoC in the sun20i series is D1, containing a single T-HEAD > C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM. > > Most peripherals are shared across the entire chip family. In fact, the > ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible > with the D1s. > > This means many existing device drivers can be reused. To facilitate > this reuse, name the symbol ARCH_SUNXI, since that is what the existing > drivers have as their dependency. > > Signed-off-by: Samuel Holland Reviewed-by: Heiko Stuebner Tested-by: Heiko Stuebner