From: Heiko Stuebner <heiko@sntech.de>
To: krzk+dt@kernel.org, palmer@dabbelt.com, robh+dt@kernel.org,
linux-riscv@lists.infradead.org
Cc: conor.dooley@microchip.com, Cyril.Jean@microchip.com,
daire.mcnamara@microchip.com, paul.walmsley@sifive.com,
aou@eecs.berkeley.edu, palmer@rivosinc.com, arnd@arndb.de,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, Conor Dooley <mail@conchuod.ie>
Subject: Re: [PATCH v3 1/8] riscv: dts: microchip: remove icicle memory clocks
Date: Wed, 04 May 2022 01:29:57 +0200 [thread overview]
Message-ID: <2237223.ElGaqSPkdT@phil> (raw)
In-Reply-To: <20220501192557.2631936-2-mail@conchuod.ie>
Am Sonntag, 1. Mai 2022, 21:25:52 CEST schrieb Conor Dooley:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> The clock properties in the icicle kit's memory entries cause dtbs_check
> errors:
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dtb: /: memory@80000000: 'clocks' does not match any of the regexes: 'pinctrl-[0-9]+'
>
> Get rid of the clocks to avoid the errors.
>
> Reported-by: Palmer Dabbelt <palmer@rivosinc.com>
> Fixes: 0fa6107eca41 ("RISC-V: Initial DTS for Microchip ICICLE board")
> Fixes: 5b28df37d311 ("riscv: dts: microchip: update peripherals in icicle kit device tree")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
I guess the memory controller consuming this clock will be sitting
somewhere in the io-area of the soc instead
> ---
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> index 3392153dd0f1..c71d6aa6137a 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> @@ -32,14 +32,12 @@ cpus {
> ddrc_cache_lo: memory@80000000 {
> device_type = "memory";
> reg = <0x0 0x80000000 0x0 0x2e000000>;
> - clocks = <&clkcfg CLK_DDRC>;
> status = "okay";
> };
>
> ddrc_cache_hi: memory@1000000000 {
> device_type = "memory";
> reg = <0x10 0x0 0x0 0x40000000>;
> - clocks = <&clkcfg CLK_DDRC>;
> status = "okay";
> };
> };
>
next prev parent reply other threads:[~2022-05-03 23:30 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-01 19:25 [PATCH v3 0/8] PolarFire SoC dt for 5.19 Conor Dooley
2022-05-01 19:25 ` [PATCH v3 1/8] riscv: dts: microchip: remove icicle memory clocks Conor Dooley
2022-05-03 23:29 ` Heiko Stuebner [this message]
2022-05-01 19:25 ` [PATCH v3 2/8] riscv: dts: microchip: move sysctrlr out of soc bus Conor Dooley
2022-05-03 23:37 ` Heiko Stuebner
2022-05-04 6:43 ` Conor.Dooley
2022-05-01 19:25 ` [PATCH v3 3/8] riscv: dts: microchip: remove soc vendor from filenames Conor Dooley
2022-05-03 23:39 ` Heiko Stuebner
2022-05-01 19:25 ` [PATCH v3 4/8] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-05-03 15:27 ` Krzysztof Kozlowski
2022-05-01 19:25 ` [PATCH v3 5/8] riscv: dts: microchip: make the fabric dtsi board specific Conor Dooley
2022-05-03 23:47 ` Heiko Stuebner
2022-05-04 6:48 ` Conor.Dooley
2022-05-04 7:11 ` Heiko Stübner
2022-05-01 19:25 ` [PATCH v3 6/8] dt-bindings: vendor-prefixes: add Sundance DSP Conor Dooley
2022-05-01 19:25 ` [PATCH v3 7/8] dt-bindings: riscv: microchip: add polarberry compatible string Conor Dooley
2022-05-01 19:25 ` [PATCH v3 8/8] riscv: dts: microchip: add the sundance polarberry Conor Dooley
2022-05-03 23:55 ` Heiko Stuebner
2022-05-04 6:51 ` Conor.Dooley
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