RE: [PATCH] x86/smpboot: Remove 486-isms from the modern AP boot path

From: David Laight <David.Laight@ACULAB.COM>
To: "'Maciej W. Rozycki'" <macro@linux-mips.org>,
	Thomas Gleixner <tglx@linutronix.de>
Cc: "hpa@zytor.com" <hpa@zytor.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	LKML <linux-kernel@vger.kernel.org>,
	Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
	"x86@kernel.org" <x86@kernel.org>,
	Jan Kiszka <jan.kiszka@siemens.com>,
	James Morris <jmorris@namei.org>,
	David Howells <dhowells@redhat.com>,
	Matthew Garrett <mjg59@google.com>,
	Josh Boyer <jwboyer@redhat.com>,
	Zhenzhong Duan <zhenzhong.duan@oracle.com>,
	Steve Wahl <steve.wahl@hpe.com>,
	Mike Travis <mike.travis@hpe.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	"Arnd Bergmann" <arnd@arndb.de>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Giovanni Gherdovich <ggherdovich@suse.cz>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	Len Brown <len.brown@intel.com>,
	Kees Cook <keescook@chromium.org>,
	Martin Molnar <martin.molnar.programming@gmail.com>,
	Pingfan Liu <kernelfans@gmail.com>,
	"jailhouse-dev@googlegroups.com" <jailhouse-dev@googlegroups.com>
Subject: RE: [PATCH] x86/smpboot: Remove 486-isms from the modern AP boot path
Date: Wed, 1 Apr 2020 10:23:55 +0000	[thread overview]
Message-ID: <23147db6f0c548259357babfc22a87d3@AcuMS.aculab.com> (raw)
In-Reply-To: <alpine.LFD.2.21.2004010001460.3939520@eddie.linux-mips.org>

From: Maciej W. Rozycki
> Sent: 01 April 2020 00:35
> On Wed, 25 Mar 2020, Thomas Gleixner wrote:
> 
> > >>@@ -1118,7 +1121,7 @@ static int do_boot_cpu(int apicid, int cpu,
> > >>struct task_struct *idle,
> > >> 		}
> > >> 	}
> > >>
> > >>-	if (x86_platform.legacy.warm_reset) {
> > >>+	if (!APIC_INTEGRATED(boot_cpu_apic_version)) {
> > >> 		/*
> > >> 		 * Cleanup possible dangling ends...
> > >> 		 */
> > >
> > > We don't support SMP on 486 and haven't for a very long time. Is there
> > > any reason to retain that code at all?
> >
> > Not that I'm aware off.
> 
>  For the record: this code is for Pentium really, covering original P5
> systems, which lacked integrated APIC, as well as P54C systems that went
> beyond dual (e.g. ALR made quad-SMP P54C systems).  They all used external
> i82489DX APICs for SMP support.  Few were ever manufactured and getting
> across one let alone running Linux might be tough these days.  I never
> managed to get one for myself, which would have been helpful for
> maintaining this code.

I remember ICL trying to get SVR4.2MP working on similar vintage hardware.
I wasn't directly involved (doing SMP sparc ethernet drivers) but ISTR
that the SMP support silicon they were using (or rather trying to use)
was basically broken.
By the time they got it (nearly) working single cpu systems were faster.

>  Even though we supported them by spec I believe we never actually ran MP
> on any 486 SMP system (Alan Cox might be able to straighten me out on
> this); none that I know of implemented the MPS even though actual hardware
> might have used the APIC architecture.  Compaq had its competing solution
> for 486 and newer SMP, actually deployed, the name of which I long forgot.
> We never supported it due to the lack of documentation combined with the
> lack of enough incentive for someone to reverse-engineer it.

I also remember one of those Compaq dual 486 boxes.
We must have has SVR4/Unixware running on it.

I suspect that any such systems would also be too slow and not have
enough memory to actually run anything recent.

OTOH there are modern 486 (like) systems than might have a reasonable
amount of memory and clock speed.

	David

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