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[83.6.165.36]) by smtp.gmail.com with ESMTPSA id p12sm1741093edt.27.2020.08.21.14.21.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 21 Aug 2020 14:21:27 -0700 (PDT) Subject: Re: [PATCH v5] arm64: dts: qcom: Add support for Xiaomi Poco F1 (Beryllium) To: Amit Pundir , Andy Gross , Bjorn Andersson , Rob Herring , John Stultz , Sumit Semwal Cc: linux-arm-msm , dt , lkml References: <1598029961-2474-1-git-send-email-amit.pundir@linaro.org> From: Konrad Dybcio Message-ID: <23c4191e-4d64-80d8-e688-27d004729ea1@gmail.com> Date: Fri, 21 Aug 2020 23:21:25 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <1598029961-2474-1-git-send-email-amit.pundir@linaro.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi First of all, sorry if anybody sees this twice. I've been messing with Thunderbird lately. > dtb-$(CONFIG_ARCH_QCOM) += sdm845-cheza-r3.dtb > dtb-$(CONFIG_ARCH_QCOM) += sdm845-db845c.dtb > +dtb-$(CONFIG_ARCH_QCOM) += sdm845-beryllium.dtb [B]eryllium should come before [C]heza, no? Also, aren't the non-development boards supposed to include the vendor name? i.e. sdm845-(xiaomi/poco)-beryllium.dtb > + model = "Xiaomi Technologies Inc. Beryllium"; At least with Xperias, we settled on setting the model property to the "pretty" name, in this case Poco F1 > + pm8998-rpmh-regulators { > + compatible = "qcom,pm8998-rpmh-regulators"; > + qcom,pmic-id = "a"; > + > + vreg_l1a_0p875: ldo1 { I think you forgot to include (regulatorname)-supply properties which should cause havoc with all things regulators.. > + vreg_l1a_0p875: ldo1 { > + regulator-min-microvolt = <880000>; > + regulator-max-microvolt = <880000>; 0p88? Unless it's a PMIC limitation.. Please also confirm names for the rest of the regulators. Also why are there so few regulators? And none from pmi8998? Are the rest WIP/coming in a followup commit, or are they disabled on this board? AFAICS you only include SoC/PMIC DTs which would suggest they should be there. > +/* Reserved memory changes from downstream */ Wouldn't it look better if you included that in the main {} node instead of reopening it in the middle of the file? I mean, it works, but let's hear what others have to say. > + * It seems that mmc_test reports errors if drive > + * strength is not 16 on clk, cmd, and data pins. You say that, but then you set "drive-strength = <10>;" for cmd and data, please confirm it's intentional. > +&ufs_mem_hc { UFS comes before USB alphabetically. > +&ufs_mem_phy Ditto > +&qup_uart6_default Ditto Konrad