From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752724AbcBHNvP (ORCPT ); Mon, 8 Feb 2016 08:51:15 -0500 Received: from mout.kundenserver.de ([217.72.192.75]:52047 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751738AbcBHNvM (ORCPT ); Mon, 8 Feb 2016 08:51:12 -0500 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Gabriele Paoloni , guohanjun@huawei.com, wangzhou1@hisilicon.com, liudongdong3@huawei.com, linuxarm@huawei.com, qiujiang@huawei.com, bhelgaas@google.com, Lorenzo.Pieralisi@arm.com, tn@semihalf.com, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, xuwei5@hisilicon.com, linux-acpi@vger.kernel.org, jcm@redhat.com, zhangjukuo@huawei.com, liguozhu@hisilicon.com Subject: Re: [RFC PATCH v2 1/3] PCI: hisi: re-architect Hip05/Hip06 controllers driver to preapare for ACPI Date: Mon, 08 Feb 2016 14:50:15 +0100 Message-ID: <2409806.1aGBrN4l0X@wuerfel> User-Agent: KMail/4.11.5 (Linux/3.16.0-10-generic; KDE/4.11.5; x86_64; ; ) In-Reply-To: <1454935264-6076-2-git-send-email-gabriele.paoloni@huawei.com> References: <1454935264-6076-1-git-send-email-gabriele.paoloni@huawei.com> <1454935264-6076-2-git-send-email-gabriele.paoloni@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Provags-ID: V03:K0:P8IhhkXX0x8yJBVd+IsSuLKF9e+qCtfvF6mCrsdFM69xsNi1yQQ 4eRudm1nNZ3O6Kbg6cw6iryEVQbZ1H50IeQDGE9VYMuqzpJjsDrg2jOdD9LF5w92haPSNA5 lD+uoQJ6dpZodxAaoEFGX9+wU0Nj0GN3Hz+KVAdUbq3AVPvCWgqSDnZtmByLUHIf1h5eyBA HJr/QbgMaM/q8HGD5V8wg== X-UI-Out-Filterresults: notjunk:1;V01:K0:ygpOSH1u+mg=:6FNjFtPusPIR8cQNJ7bEHu MZtPMOzgTQlgMGFpCk9q2PxOwX0s4CbQCZLPNxyrIkn2qz0bTwGrmD6Nc5fLB/2PQ1CcfH/yp b4p9OVbggHgLjWZs3m/oDnwOJMm+754IkhFyV2rlwnaTMqDoBcMkLqSsTTMllTEgKrFfT5G6a MOxOTFYq92uNcF8mFNq7Dm9OgAsgYuSPiWa8MPnnt1TdOrAQA4yZhwej6dC77LFHyPQQz3KQS BqSeEOdh0UwCghgiemy5m7dzIfbN8gaaGh5Av8aJKgpC3w7jN4sbrw7/nuo1CCyJasR2/U5EE W/diBvKJ7LX9upYUn4FtnNgWMDEn4+WSZUI5+V+wImiZSWtINHqv2Z4Bl/Iqlj9OLLMczVSWr HXT2oEi2blB0B4Aj22vVoCg9OAmvfeGjoeXYTZHcC+rgE/GNYfcCXmSOxyw2XdJHMch4HrOfj 09ReRwlfYd0qQFIsM7dRQuYYjXsEzmmQPrFs0J9EQ2UZdpZ1K0QfHlILoStqHQRaDhyU3WMki PMcqPPHK/GZC3K/sCmDHZFem6KD6JSqgQOK7SJHCcSsmljdjUfQ3k7TRVVp30YrwP2t5agIui kMXuGqwAsZlFPj+VJrquYGqpojUK88aZ/tkO3OZZiAyMq5Po3XaqBlmtlTu26Dl4yvgjkBQz6 gBcKco6j9gpIAn7Il9YIlQGJiLXfepNRLCkPMeYiDcuHvUcd3vZf6CMAG3/7uhxYTSX6yGqMi A0D41HqKNqHfClo+ Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Monday 08 February 2016 12:41:02 Gabriele Paoloni wrote: > + > +/* HipXX PCIe host only supports 32-bit config access */ > +int hisi_pcie_common_cfg_read(void __iomem *reg_base, int where, int size, > + u32 *val) > +{ > + u32 reg; > + u32 reg_val; > + void *walker = ®_val; > + > + walker += (where & 0x3); > + reg = where & ~0x3; > + reg_val = readl(reg_base + reg); > + > + if (size == 1) > + *val = *(u8 __force *) walker; > + else if (size == 2) > + *val = *(u16 __force *) walker; > + else if (size == 4) > + *val = reg_val; > + else > + return PCIBIOS_BAD_REGISTER_NUMBER; > + > + return PCIBIOS_SUCCESSFUL; > +} Isn't this the same hack that Qualcomm are using? Arnd