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From: Sandipan Das <sandipan.das@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	x86@kernel.org, bp@alien8.de, dave.hansen@linux.intel.com,
	acme@kernel.org, mark.rutland@arm.com,
	alexander.shishkin@linux.intel.com, namhyung@kernel.org,
	jolsa@kernel.org, tglx@linutronix.de, mingo@redhat.com,
	pbonzini@redhat.com, jmattson@google.com,
	like.xu.linux@gmail.com, eranian@google.com,
	ananth.narayan@amd.com, ravi.bangoria@amd.com,
	santosh.shukla@amd.com
Subject: Re: [PATCH 7/7] kvm: x86/cpuid: Fix Architectural Performance Monitoring support
Date: Fri, 18 Mar 2022 13:29:11 +0530	[thread overview]
Message-ID: <27057728-e22f-a36e-bc68-aac311aeecba@amd.com> (raw)
In-Reply-To: <YjMkk/O1UqaKpFja@hirez.programming.kicks-ass.net>


On 3/17/2022 5:37 PM, Peter Zijlstra wrote:
> On Thu, Mar 17, 2022 at 11:58:36AM +0530, Sandipan Das wrote:
>> CPUID 0xA provides information on Architectural Performance
>> Monitoring features on some x86 processors. It advertises a
>> PMU version which Qemu uses to determine the availability of
>> additional MSRs to manage the PMCs.
>>
>> Upon receiving a KVM_GET_SUPPORTED_CPUID ioctl request for
>> the same, the kernel constructs return values based on the
>> x86_pmu_capability irrespective of the vendor.
>>
>> This CPUID function and additional MSRs are not supported on
>> AMD processors. If PerfMonV2 is detected, the PMU version is
>> set to 2 and guest startup breaks because of an attempt to
>> access a non-existent MSR. Return zeros to avoid this.
>>
>> Fixes: a6c06ed1a60a ("KVM: Expose the architectural performance monitoring CPUID leaf")
>> Reported-by: Vasant Hegde <vasant.hegde@amd.com>
>> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
>> ---
>>  arch/x86/kvm/cpuid.c | 5 +++++
>>  1 file changed, 5 insertions(+)
>>
>> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
>> index b8f8d268d058..1d9ca5726167 100644
>> --- a/arch/x86/kvm/cpuid.c
>> +++ b/arch/x86/kvm/cpuid.c
>> @@ -865,6 +865,11 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
>>  		union cpuid10_eax eax;
>>  		union cpuid10_edx edx;
>>  
>> +		if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD) {
>> +			entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
>> +			break;
>> +		}
>> +
> 
> Because actually implementing perfmon-v2 would've been too convenient,
> right? IIRC you're very close to actually supporing perfmon-v2
> capability wise here.

That's in the works as well. However, in this case, Qemu will have
to test CPUID Fn8000_0022 EAX bit 0 to see if the global control and
status registers are available.

- Sandipan

  reply	other threads:[~2022-03-18  7:59 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-17  6:28 [PATCH 0/7] perf/x86/amd/core: Add AMD PerfMonV2 support Sandipan Das
2022-03-17  6:28 ` [PATCH 1/7] x86/cpufeatures: Add PerfMonV2 feature bit Sandipan Das
2022-03-17  6:28 ` [PATCH 2/7] x86/msr: Add PerfCntrGlobal* registers Sandipan Das
2022-03-17 11:25   ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 3/7] perf/x86/amd/core: Detect PerfMonV2 support Sandipan Das
2022-03-17 11:27   ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 4/7] perf/x86/amd/core: Detect available counters Sandipan Das
2022-03-17 11:32   ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 5/7] perf/x86/amd/core: Add PerfMonV2 counter control Sandipan Das
2022-03-17 11:46   ` Peter Zijlstra
2022-03-18  8:02     ` Sandipan Das
2022-03-18 10:52       ` Peter Zijlstra
2022-03-17  6:28 ` [PATCH 6/7] perf/x86/amd/core: Add PerfMonV2 overflow handling Sandipan Das
2022-03-17 12:01   ` Peter Zijlstra
2022-03-17 17:45     ` Stephane Eranian
2022-03-18  8:18     ` Sandipan Das
2022-03-22  7:06   ` Like Xu
2022-03-22  8:37     ` Sandipan Das
2022-03-17  6:28 ` [PATCH 7/7] kvm: x86/cpuid: Fix Architectural Performance Monitoring support Sandipan Das
2022-03-17 12:07   ` Peter Zijlstra
2022-03-18  7:59     ` Sandipan Das [this message]
2022-03-22  7:31   ` Like Xu

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