Re: [PATCH RFC 2/2] ARM: pxa: transition to dmaengine phase 1

From: Arnd Bergmann <arnd@arndb.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Robert Jarzmik <robert.jarzmik@free.fr>,
	Vinod Koul <vinod.koul@intel.com>,
	Olof Johansson <olof@lixom.net>, Daniel Mack <zonque@gmail.com>,
	Haojian Zhuang <haojian.zhuang@gmail.com>,
	dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC 2/2] ARM: pxa: transition to dmaengine phase 1
Date: Mon, 16 Feb 2015 11:28:57 +0100	[thread overview]
Message-ID: <2708248.TZ13zqn6jW@wuerfel> (raw)
In-Reply-To: <1423954053-21760-3-git-send-email-robert.jarzmik@free.fr>

On Saturday 14 February 2015 23:47:33 Robert Jarzmik wrote:
> @@ -294,7 +294,8 @@ int pxa_request_dma (char *name, pxa_dma_prio prio,
>                 /* try grabbing a DMA channel with the requested priority */
>                 for (i = 0; i < num_dma_channels; i++) {
>                         if ((dma_channels[i].prio == prio) &&
> -                           !dma_channels[i].name) {
> +                           !dma_channels[i].name &&
> +                           !mmp_pdma_toggle_reserved_channel(i)) {
>                                 found = 1;
>                                 break;
>                         }
> 

How is the order between the two enforced? I.e. can it be that the dmaengine
driver uses the same channel for a different slave before we get here?

If this is ensured to work, I'm fine with your approach.

	Arnd